arm: Drop old kona code

The KONA and KONA_GPIO options don't exist anymore, since this commit:

   0f6807e77b0 arm: Remove bcm28155_ap board

Drop the dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index bfbd85ae64ef74b2b645ec84facbc2f139cc8e8a..7d7907601ec887329cce4847cb5731bafdfdb81c 100644 (file)
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -26,7 +26,6 @@ obj-$(CONFIG_ARMV7_NONSEC)    += nonsec_virt.o virt-v7.o virt-dt.o
 obj-$(CONFIG_ARMV7_PSCI)       += psci.o psci-common.o
 
 obj-$(CONFIG_IPROC) += iproc-common/
-obj-$(CONFIG_KONA) += kona-common/
 obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
 
 ifneq (,$(filter s5pc1xx exynos,$(SOC)))

diff --git a/arch/arm/cpu/armv7/kona-common/Makefile b/arch/arm/cpu/armv7/kona-common/Makefile
deleted file mode 100644 (file)
index 56de3d1..0000000
--- a/arch/arm/cpu/armv7/kona-common/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright 2013 Broadcom Corporation.
-
-obj-y  += s_init.o
-obj-y  += hwinit-common.o
-obj-y  += clk-stubs.o
-obj-${CONFIG_KONA_RESET_S} += reset.o

diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
deleted file mode 100644 (file)
index 4eddaca..0000000
--- a/arch/arm/cpu/armv7/kona-common/clk-stubs.c
+++ /dev/null
@@ -1,25 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2013 Broadcom Corporation.
- */
-
-#include <common.h>
-
-/*
- * These weak functions are available to kona architectures that don't
- * require clock enables from the driver code.
- */
-int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
-{
-       return 0;
-}
-
-int __weak clk_bsc_enable(void *base)
-{
-       return 0;
-}
-
-int __weak clk_usb_otg_enable(void *base)
-{
-       return 0;
-}

diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
deleted file mode 100644 (file)
index cfc7c9f..0000000
--- a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2013 Broadcom Corporation.
- */
-
-#include <common.h>
-#include <cpu_func.h>
-#include <asm/cache.h>
-#include <linux/sizes.h>
-
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-void enable_caches(void)
-{
-       /* Enable D-cache. I-cache is already enabled in start.S */
-       dcache_enable();
-}
-#endif

diff --git a/arch/arm/cpu/armv7/kona-common/reset.S b/arch/arm/cpu/armv7/kona-common/reset.S
deleted file mode 100644 (file)
index eea835b..0000000
--- a/arch/arm/cpu/armv7/kona-common/reset.S
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2013 Broadcom Corporation.
- */
-
-.globl reset_cpu
-reset_cpu:
-       ldr     r1, =0x35001f00
-       ldr     r2, [r1]
-       ldr     r4, =0x80000000
-       and     r4, r2, r4
-       ldr     r3, =0xA5A500
-       orr     r4, r4, r3
-       orr     r4, r4, #0x1
-
-       str     r4, [r1]
-
-       ldr     r1, =0x35001f04
-       ldr     r2, [r1]
-       ldr     r4, =0x80000000
-       and     r4, r2, r4
-       str     r4, [r1]
-
-_loop_forever:
-       b       _loop_forever

diff --git a/arch/arm/cpu/armv7/kona-common/s_init.c b/arch/arm/cpu/armv7/kona-common/s_init.c
deleted file mode 100644 (file)
index 778b917..0000000
--- a/arch/arm/cpu/armv7/kona-common/s_init.c
+++ /dev/null
@@ -1,11 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Broadcom Corporation.
- */
-
-/*
- * Early system init. Currently empty.
- */
-void s_init(void)
-{
-}

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 07fca7bd33dcce787c47b436134e27803b7aeb87..ec65f70c31815898bf468e1a316bb9c639ff7c06 100644 (file)
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -23,7 +23,6 @@ obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
 obj-$(CONFIG_INTEL_BROADWELL_GPIO)     += intel_broadwell_gpio.o
 obj-$(CONFIG_IPROC_GPIO)       += iproc_gpio.o
 obj-$(CONFIG_KIRKWOOD_GPIO)    += kw_gpio.o
-obj-$(CONFIG_KONA_GPIO)        += kona_gpio.o
 obj-$(CONFIG_MCP230XX_GPIO)    += mcp230xx_gpio.o
 obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
 obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o

diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c
deleted file mode 100644 (file)
index 2979188..0000000
--- a/drivers/gpio/kona_gpio.c
+++ /dev/null
@@ -1,141 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2013 Broadcom Corporation.
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <asm/arch/sysmap.h>
-
-#define GPIO_BASE                              (void *)GPIO2_BASE_ADDR
-
-#define GPIO_PASSWD                            0x00a5a501
-#define GPIO_PER_BANK                          32
-#define GPIO_MAX_BANK_NUM                      8
-
-#define GPIO_BANK(gpio)                                ((gpio) >> 5)
-#define GPIO_BITMASK(gpio)     \
-       (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
-
-#define GPIO_OUT_STATUS(bank)                  (0x00000000 + ((bank) << 2))
-#define GPIO_IN_STATUS(bank)                   (0x00000020 + ((bank) << 2))
-#define GPIO_OUT_SET(bank)                     (0x00000040 + ((bank) << 2))
-#define GPIO_OUT_CLEAR(bank)                   (0x00000060 + ((bank) << 2))
-#define GPIO_INT_STATUS(bank)                  (0x00000080 + ((bank) << 2))
-#define GPIO_INT_MASK(bank)                    (0x000000a0 + ((bank) << 2))
-#define GPIO_INT_MSKCLR(bank)                  (0x000000c0 + ((bank) << 2))
-#define GPIO_CONTROL(bank)                     (0x00000100 + ((bank) << 2))
-#define GPIO_PWD_STATUS(bank)                  (0x00000500 + ((bank) << 2))
-
-#define GPIO_GPPWR_OFFSET                      0x00000520
-
-#define GPIO_GPCTR0_DBR_SHIFT                  5
-#define GPIO_GPCTR0_DBR_MASK                   0x000001e0
-
-#define GPIO_GPCTR0_ITR_SHIFT                  3
-#define GPIO_GPCTR0_ITR_MASK                   0x00000018
-#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE                0x00000001
-#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE       0x00000002
-#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE          0x00000003
-
-#define GPIO_GPCTR0_IOTR_MASK                  0x00000001
-#define GPIO_GPCTR0_IOTR_CMD_0UTPUT            0x00000000
-#define GPIO_GPCTR0_IOTR_CMD_INPUT             0x00000001
-
-int gpio_request(unsigned gpio, const char *label)
-{
-       unsigned int value, off;
-
-       writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
-       off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
-       value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
-       writel(value, GPIO_BASE + off);
-
-       return 0;
-}
-
-int gpio_free(unsigned gpio)
-{
-       unsigned int value, off;
-
-       writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
-       off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
-       value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
-       writel(value, GPIO_BASE + off);
-
-       return 0;
-}
-
-int gpio_direction_input(unsigned gpio)
-{
-       u32 val;
-
-       val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
-       val &= ~GPIO_GPCTR0_IOTR_MASK;
-       val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
-       writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
-
-       return 0;
-}
-
-int gpio_direction_output(unsigned gpio, int value)
-{
-       int bank_id = GPIO_BANK(gpio);
-       int bitmask = GPIO_BITMASK(gpio);
-       u32 val, off;
-
-       val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
-       val &= ~GPIO_GPCTR0_IOTR_MASK;
-       val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
-       writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
-       off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
-
-       val = readl(GPIO_BASE + off);
-       val |= bitmask;
-       writel(val, GPIO_BASE + off);
-
-       return 0;
-}
-
-int gpio_get_value(unsigned gpio)
-{
-       int bank_id = GPIO_BANK(gpio);
-       int bitmask = GPIO_BITMASK(gpio);
-       u32 val, off;
-
-       /* determine the GPIO pin direction */
-       val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
-       val &= GPIO_GPCTR0_IOTR_MASK;
-
-       /* read the GPIO bank status */
-       off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
-           GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
-       val = readl(GPIO_BASE + off);
-
-       /* return the specified bit status */
-       return !!(val & bitmask);
-}
-
-void gpio_set_value(unsigned gpio, int value)
-{
-       int bank_id = GPIO_BANK(gpio);
-       int bitmask = GPIO_BITMASK(gpio);
-       u32 val, off;
-
-       /* determine the GPIO pin direction */
-       val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
-       val &= GPIO_GPCTR0_IOTR_MASK;
-
-       /* this function only applies to output pin */
-       if (GPIO_GPCTR0_IOTR_CMD_INPUT == val) {
-               printf("%s: Cannot set an input pin %d\n", __func__, gpio);
-               return;
-       }
-
-       off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
-
-       val = readl(GPIO_BASE + off);
-       val |= bitmask;
-       writel(val, GPIO_BASE + off);
-}