arm: dts: add imx8mm-cl-iot-gate dts file

Add board dts for imx8mm-cl-iot-gate

Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peter Robinson <pbrobinson@gmail.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 90942b27206c51097dc966be80900bef421e1b4a..a8d42d7c335c71706da2e76cbdec6e512a5d56ad 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1085,6 +1085,8 @@ dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
 
 dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
 
+dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here

diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
new file mode 100644 (file)
index 0000000..3226a24
--- /dev/null
+++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
@@ -0,0 +1,255 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+/ {
+       binman: binman {
+               multiple-images;
+       };
+
+       wdt-reboot {
+               compatible = "wdt-reboot";
+               wdt = <&wdog1>;
+               u-boot,dm-spl;
+       };
+
+       firmware {
+               optee {
+                       compatible = "linaro,optee-tz";
+                       method = "smc";
+               };
+       };
+};
+
+&{/soc@0} {
+       u-boot,dm-pre-reloc;
+       u-boot,dm-spl;
+};
+
+&clk {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-parents;
+       /delete-property/ assigned-clock-rates;
+};
+
+&osc_24m {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&aips1 {
+       u-boot,dm-spl;
+       u-boot,dm-pre-reloc;
+};
+
+&aips2 {
+       u-boot,dm-spl;
+};
+
+&aips3 {
+       u-boot,dm-spl;
+};
+
+&iomuxc {
+       u-boot,dm-spl;
+};
+
+&pinctrl_uart3 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2_gpio {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+       u-boot,dm-spl;
+};
+
+&gpio1 {
+       u-boot,dm-spl;
+};
+
+&gpio2 {
+       u-boot,dm-spl;
+};
+
+&gpio3 {
+       u-boot,dm-spl;
+};
+
+&gpio4 {
+       u-boot,dm-spl;
+};
+
+&gpio5 {
+       u-boot,dm-spl;
+};
+
+&uart3 {
+       u-boot,dm-spl;
+};
+
+&usdhc1 {
+       u-boot,dm-spl;
+};
+
+&usdhc2 {
+       u-boot,dm-spl;
+};
+
+&usdhc3 {
+       u-boot,dm-spl;
+};
+
+&i2c1 {
+       u-boot,dm-spl;
+};
+
+&i2c2 {
+       u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
+       u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} {
+       u-boot,dm-spl;
+};
+
+&pinctrl_i2c2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_pmic {
+       u-boot,dm-spl;
+};
+
+&fec1 {
+       phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+};
+
+&wdog1 {
+       u-boot,dm-spl;
+};
+
+&binman {
+       u-boot-spl-ddr {
+               filename = "u-boot-spl-ddr.bin";
+               pad-byte = <0xff>;
+               align-size = <4>;
+               align = <4>;
+
+               u-boot-spl {
+                       align-end = <4>;
+               };
+
+               blob_1: blob-ext@1 {
+                       filename = "lpddr4_pmu_train_1d_imem.bin";
+                       size = <0x8000>;
+               };
+
+               blob_2: blob-ext@2 {
+                       filename = "lpddr4_pmu_train_1d_dmem.bin";
+                       size = <0x4000>;
+               };
+
+               blob_3: blob-ext@3 {
+                       filename = "lpddr4_pmu_train_2d_imem.bin";
+                       size = <0x8000>;
+               };
+
+               blob_4: blob-ext@4 {
+                       filename = "lpddr4_pmu_train_2d_dmem.bin";
+                       size = <0x4000>;
+               };
+       };
+
+       flash {
+               mkimage {
+                       args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000";
+
+                       blob {
+                               filename = "u-boot-spl-ddr.bin";
+                       };
+               };
+       };
+
+       itb {
+               filename = "u-boot.itb";
+
+               fit {
+                       description = "Configuration to load ATF before U-Boot";
+                       #address-cells = <1>;
+                       fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+
+                       images {
+                               uboot {
+                                       description = "U-Boot (64-bit)";
+                                       type = "standalone";
+                                       arch = "arm64";
+                                       compression = "none";
+                                       load = <CONFIG_SYS_TEXT_BASE>;
+
+                                       uboot_blob: blob-ext {
+                                               filename = "u-boot-nodtb.bin";
+                                       };
+                               };
+
+                               atf {
+                                       description = "ARM Trusted Firmware";
+                                       type = "firmware";
+                                       arch = "arm64";
+                                       compression = "none";
+                                       load = <0x920000>;
+                                       entry = <0x920000>;
+
+                                       atf_blob: blob-ext {
+                                               filename = "bl31.bin";
+                                       };
+                               };
+
+                               fip {
+                                       description = "Trusted Firmware FIP";
+                                       type = "firmware";
+                                       arch = "arm64";
+                                       compression = "none";
+                                       load = <0x40310000>;
+
+                                       fip_blob: blob-ext{
+                                               filename = "fip.bin";
+                                       };
+                               };
+
+                               fdt {
+                                       description = "NAME";
+                                       type = "flat_dt";
+                                       compression = "none";
+
+                                       uboot_fdt_blob: blob-ext {
+                                               filename = "u-boot.dtb";
+                                       };
+                               };
+                       };
+
+                       configurations {
+                               default = "conf";
+
+                               conf {
+                                       description = "NAME";
+                                       firmware = "uboot";
+                                       loadables = "atf", "fip";
+                                       fdt = "fdt";
+                               };
+                       };
+               };
+       };
+};

diff --git a/arch/arm/dts/imx8mm-cl-iot-gate.dts b/arch/arm/dts/imx8mm-cl-iot-gate.dts
new file mode 100644 (file)
index 0000000..62e8d03
--- /dev/null
+++ b/arch/arm/dts/imx8mm-cl-iot-gate.dts
@@ -0,0 +1,553 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/usb/pd.h>
+#include "imx8mm.dtsi"
+
+/ {
+       model = "CompuLab IOT-GATE-iMX8";
+       compatible = "sb-iotgimx8", "cpl,ucm-imx8m-mini", "fsl,imx8mm-evk", "fsl,imx8mm";
+
+       chosen {
+               bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200";
+               stdout-path = &uart3;
+       };
+
+       reg_vusb_5v: regulator-usdhc2 {
+               compatible = "regulator-fixed";
+               regulator-name = "VUSB_5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio4 28 GPIO_ACTIVE_HIGH>;
+               regulator-boot-on;
+               enable-active-high;
+       };
+
+       reg_usdhc2_vqmmc: regulator-usdhc2_1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "usdhc2_1v8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+       };
+
+       reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
+               compatible = "regulator-fixed";
+               regulator-name = "VSD_3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               startup-delay-us = <100>;
+               off-on-delay-us = <12000>;
+       };
+};
+
+&A53_0 {
+       cpu-supply = <&buck2_reg>;
+};
+
+&fec1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec1>;
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethphy0>;
+       fsl,magic-packet;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy0: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <0>;
+                       at803x,led-act-blind-workaround;
+                       at803x,eee-okay;
+                       at803x,vddio-1p8v;
+               };
+       };
+};
+
+&i2c1 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       eeprom@54 {
+                 compatible = "atmel,24c08";
+                 reg = <0x54>;
+                 pagesize = <16>;
+       };
+};
+
+&i2c2 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       rtc@69 {
+               compatible = "abracon,ab1805";
+               reg = <0x69>;
+               pagesize = <16>;
+               status = "okay";
+       };
+
+       pmic@4b {
+               compatible = "rohm,bd71837";
+               reg = <0x4b>;
+               pinctrl-0 = <&pinctrl_pmic>;
+               gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <3 GPIO_ACTIVE_LOW>;
+
+               gpo {
+                       rohm,drv = <0x0C>;      /* 0b0000_1100 all gpos with cmos output mode */
+               };
+
+               regulators {
+                       bd71837,pmic-buck2-uses-i2c-dvs;
+                       bd71837,pmic-buck2-dvs-voltage = <1000000>,
+                               <900000>,
+                               <0>; /* VDD_ARM: Run-Idle */
+                       buck1_reg: BUCK1 {
+                               regulator-name = "BUCK1";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <1250>;
+                       };
+
+                       buck2_reg: BUCK2 {
+                               regulator-name = "BUCK2";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <1250>;
+                       };
+
+                       buck3_reg: BUCK3 {
+                               regulator-name = "BUCK3";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1350000>;
+                       };
+
+                       buck4_reg: BUCK4 {
+                               regulator-name = "BUCK4";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck5_reg: BUCK5 {
+                               regulator-name = "BUCK5";
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck6_reg: BUCK6 {
+                               regulator-name = "BUCK6";
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck7_reg: BUCK7 {
+                               regulator-name = "BUCK7";
+                               regulator-min-microvolt = <1605000>;
+                               regulator-max-microvolt = <1995000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck8_reg: BUCK8 {
+                               regulator-name = "BUCK8";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1400000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo1_reg: LDO1 {
+                               regulator-name = "LDO1";
+                               regulator-min-microvolt = <3000000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo2_reg: LDO2 {
+                               regulator-name = "LDO2";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo3_reg: LDO3 {
+                               regulator-name = "LDO3";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo4_reg: LDO4 {
+                               regulator-name = "LDO4";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo5_reg: LDO5 {
+                               regulator-name = "LDO5";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo6_reg: LDO6 {
+                               regulator-name = "LDO6";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo7_reg: LDO7 {
+                               regulator-name = "LDO7";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+               };
+       };
+
+       ptn5110: tcpc@50 {
+               compatible = "nxp,ptn5110";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_typec1>;
+               reg = <0x50>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <11 8>;
+               status = "okay";
+
+               port {
+                       typec1_dr_sw: endpoint {
+                               remote-endpoint = <&usb1_drd_sw>;
+                       };
+               };
+
+               typec1_con: connector {
+                       compatible = "usb-c-connector";
+                       label = "USB-C";
+                       power-role = "dual";
+                       data-role = "dual";
+                       try-power-role = "sink";
+                       source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+                       sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+                                    PDO_VAR(5000, 20000, 3000)>;
+                       op-sink-microwatt = <15000000>;
+                       self-powered;
+               };
+       };
+};
+
+&i2c3 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       status = "disabled";
+};
+
+&i2c4 {/* Expansion connector I2C */
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       status = "okay";
+
+       pca9555: gpio@22 {
+               compatible = "nxp,pca9555";
+               reg = <0x22>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+};
+
+&snvs_pwrkey {
+       status = "okay";
+};
+
+&uart3 { /* console */
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       status = "okay";
+};
+
+&usbotg1 {
+       dr_mode = "host";
+       hnp-disable;
+       srp-disable;
+       adp-disable;
+       usb-role-switch;
+       vbus-supply = <&reg_vusb_5v>;
+       status = "okay";
+
+       port {
+               usb1_drd_sw: endpoint {
+                       remote-endpoint = <&typec1_dr_sw>;
+               };
+       };
+};
+
+&usbotg2 {
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+       bus-width = <4>;
+       fsl,wp-controller;
+       vmmc-supply = <&reg_usdhc2_vmmc>;
+       no-1-8-v;
+       mmc-ddr-1_8v;
+       non-removable;
+       vqmmc-supply = <&reg_usdhc2_vqmmc>;
+       status = "okay";
+};
+
+&usdhc3 {
+       pinctrl-names = "default", "state_100mhz";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+
+       pinctrl_hog: hoggrp {
+               fsl,pins = <
+                       /* USB VBUS enable GPIO */
+                       MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28               0x00
+               >;
+       };
+
+       pinctrl_hog_1: hoggrp-1 {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8               0x19
+                       MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0               0x140
+                       MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15              0x140
+               >;
+       };
+
+       pinctrl_fec1: fec1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
+                       MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
+                       MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
+                       MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
+                       MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
+                       MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
+                       MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
+                       MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
+                       MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
+                       MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
+                       MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
+                       MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
+                       MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
+                       MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
+                       MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22                0x19
+               >;
+       };
+
+       pinctrl_flexspi0: flexspi0grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK       0x1c4
+                       MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B    0x84
+                       MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0   0x84
+                       MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1   0x84
+                       MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2   0x84
+                       MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3   0x84
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL                  0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA                  0x400001c3
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL                  0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA                  0x400001c3
+               >;
+       };
+
+       pinctrl_i2c3: i2c3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL                  0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA                  0x400001c3
+               >;
+       };
+
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL                  0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA                  0x400001c3
+               >;
+       };
+
+       pinctrl_pmic: pmicirq {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x41
+               >;
+       };
+
+       pinctrl_typec1: typec1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11      0x159
+               >;
+       };
+
+       pinctrl_uart3: uart1grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX             0x49
+                       MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX             0x49
+               >;
+       };
+
+       pinctrl_uart4: uart4grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B        0x49
+                       MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX           0x49
+                       MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B         0x49
+                       MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX           0x49
+               >;
+       };
+
+       pinctrl_usdhc2_gpio: usdhc2grpgpio {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19     0x41
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x190
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d0
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d0
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d0
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
+               >;
+       };
+
+       pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x194
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d4
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d4
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d4
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
+               >;
+       };
+
+       pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x196
+                       MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD         0x1d6
+                       MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2     0x1d6
+                       MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3     0x1d6
+                       MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT  0x1d0
+               >;
+       };
+
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK               0x40000190
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD               0x1d0
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0           0x1d0
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1           0x1d0
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2           0x1d0
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3           0x1d0
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4             0x1d0
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5            0x1d0
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6            0x1d0
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7              0x1d0
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE           0x190
+               >;
+       };
+
+       pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK               0x40000194
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD               0x1d4
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0           0x1d4
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1           0x1d4
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2           0x1d4
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3           0x1d4
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4             0x1d4
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5            0x1d4
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6            0x1d4
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7              0x1d4
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE           0x194
+               >;
+       };
+
+       pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+               fsl,pins = <
+                       MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK               0x40000196
+                       MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD               0x1d6
+                       MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0           0x1d6
+                       MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1           0x1d6
+                       MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2           0x1d6
+                       MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3           0x1d6
+                       MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4             0x1d6
+                       MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5            0x1d6
+                       MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6            0x1d6
+                       MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7              0x1d6
+                       MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE           0x196
+               >;
+       };
+
+       pinctrl_wdog: wdoggrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B    0xc6
+               >;
+       };
+};