]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
stm32mp1: update boot mode management
authorPatrick Delaunay <patrick.delaunay@st.com>
Wed, 27 Feb 2019 16:01:12 +0000 (17:01 +0100)
committerPatrick Delaunay <patrick.delaunay@st.com>
Fri, 12 Apr 2019 14:09:13 +0000 (16:09 +0200)
- export the function get_bootmode() and reused it in spl code
- manage uart instance by alias (prepare v4.19 binding)
- solve issue on nand instance
- restore console for uart boot

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
arch/arm/mach-stm32mp/cpu.c
arch/arm/mach-stm32mp/include/mach/stm32.h
arch/arm/mach-stm32mp/include/mach/sys_proto.h
arch/arm/mach-stm32mp/spl.c

index b96720fe5a2d093f5d173ea695a8994a916a5add..753ff3e4dbd1ccf48eb58d5c1c2b8830ad398144 100644 (file)
@@ -129,14 +129,19 @@ static void dbgmcu_init(void)
 }
 #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
 
-static u32 get_bootmode(void)
-{
-       u32 boot_mode;
 #if !defined(CONFIG_STM32MP1_TRUSTED) && \
        (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
+/* get bootmode from ROM code boot context: saved in TAMP register */
+static void update_bootmode(void)
+{
+       u32 boot_mode;
        u32 bootrom_itf = readl(BOOTROM_PARAM_ADDR);
        u32 bootrom_device, bootrom_instance;
 
+       /* enable TAMP clock = RTCAPBEN */
+       writel(BIT(8), RCC_MP_APB5ENSETR);
+
+       /* read bootrom context */
        bootrom_device =
                (bootrom_itf & BOOTROM_MODE_MASK) >> BOOTROM_MODE_SHIFT;
        bootrom_instance =
@@ -150,12 +155,14 @@ static u32 get_bootmode(void)
        clrsetbits_le32(TAMP_BOOT_CONTEXT,
                        TAMP_BOOT_MODE_MASK,
                        boot_mode << TAMP_BOOT_MODE_SHIFT);
-#else
-       /* read TAMP backup register */
-       boot_mode = (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_MODE_MASK) >>
-                   TAMP_BOOT_MODE_SHIFT;
+}
 #endif
-       return boot_mode;
+
+u32 get_bootmode(void)
+{
+       /* read bootmode from TAMP backup register */
+       return (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_MODE_MASK) >>
+                   TAMP_BOOT_MODE_SHIFT;
 }
 
 /*
@@ -172,10 +179,10 @@ int arch_cpu_init(void)
        dbgmcu_init();
 #ifndef CONFIG_STM32MP1_TRUSTED
        security_init();
+       update_bootmode();
 #endif
 #endif
 
-       /* get bootmode from BootRom context: saved in TAMP register */
        boot_mode = get_bootmode();
 
        if ((boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART)
@@ -247,20 +254,48 @@ int print_cpuinfo(void)
 
 static void setup_boot_mode(void)
 {
+       const u32 serial_addr[] = {
+               STM32_USART1_BASE,
+               STM32_USART2_BASE,
+               STM32_USART3_BASE,
+               STM32_UART4_BASE,
+               STM32_UART5_BASE,
+               STM32_USART6_BASE,
+               STM32_UART7_BASE,
+               STM32_UART8_BASE
+       };
        char cmd[60];
        u32 boot_ctx = readl(TAMP_BOOT_CONTEXT);
        u32 boot_mode =
                (boot_ctx & TAMP_BOOT_MODE_MASK) >> TAMP_BOOT_MODE_SHIFT;
        int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
+       struct udevice *dev;
+       int alias;
 
        pr_debug("%s: boot_ctx=0x%x => boot_mode=%x, instance=%d\n",
                 __func__, boot_ctx, boot_mode, instance);
 
        switch (boot_mode & TAMP_BOOT_DEVICE_MASK) {
        case BOOT_SERIAL_UART:
-               sprintf(cmd, "%d", instance);
-               env_set("boot_device", "uart");
+               if (instance > ARRAY_SIZE(serial_addr))
+                       break;
+               /* serial : search associated alias in devicetree */
+               sprintf(cmd, "serial@%x", serial_addr[instance]);
+               if (uclass_get_device_by_name(UCLASS_SERIAL, cmd, &dev))
+                       break;
+               if (fdtdec_get_alias_seq(gd->fdt_blob, "serial",
+                                        dev_of_offset(dev), &alias))
+                       break;
+               sprintf(cmd, "%d", alias);
+               env_set("boot_device", "serial");
                env_set("boot_instance", cmd);
+
+               /* restore console on uart when not used */
+               if (gd->cur_serial_dev != dev) {
+                       gd->flags &= ~(GD_FLG_SILENT |
+                                      GD_FLG_DISABLE_CONSOLE);
+                       printf("serial boot with console enabled!\n");
+               }
                break;
        case BOOT_SERIAL_USB:
                env_set("boot_device", "usb");
index 85d783cccb8a2bc29374f7ee8e71b975aec7335c..f2ab026a5a44fda5751b6144556b2fe4c46e198e 100644 (file)
@@ -18,8 +18,6 @@
 #define STM32_ETZPC_BASE               0x5C007000
 #define STM32_TAMP_BASE                        0x5C00A000
 
-#ifdef CONFIG_DEBUG_UART_BASE
-/* hardcoded value can be only used for DEBUG UART */
 #define STM32_USART1_BASE              0x5C000000
 #define STM32_USART2_BASE              0x4000E000
 #define STM32_USART3_BASE              0x4000F000
@@ -28,7 +26,6 @@
 #define STM32_USART6_BASE              0x44003000
 #define STM32_UART7_BASE               0x40018000
 #define STM32_UART8_BASE               0x40019000
-#endif
 
 #define STM32_SYSRAM_BASE              0x2FFC0000
 #define STM32_SYSRAM_SIZE              SZ_256K
index 41d4b40bcb4fccb0975cf4a78285465ec73230b6..8b426c08f691730ca1afd67ebbd86b4dbdbf4c50 100644 (file)
@@ -13,3 +13,5 @@ u32 get_cpu_type(void);
 
 /* return CPU_REV constants */
 u32 get_cpu_rev(void);
+/* return boot mode */
+u32 get_bootmode(void);
index 790973e8b6e9101bcfb9a10f896f36c68776c8cc..c6ae73d600be280188b1ac679437aeb323717b54 100644 (file)
@@ -12,8 +12,7 @@ u32 spl_boot_device(void)
 {
        u32 boot_mode;
 
-       boot_mode = (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_MODE_MASK) >>
-                   TAMP_BOOT_MODE_SHIFT;
+       boot_mode = get_bootmode();
 
        switch (boot_mode) {
        case BOOT_FLASH_SD_1:
@@ -22,6 +21,21 @@ u32 spl_boot_device(void)
        case BOOT_FLASH_SD_2:
        case BOOT_FLASH_EMMC_2:
                return BOOT_DEVICE_MMC2;
+       case BOOT_SERIAL_UART_1:
+       case BOOT_SERIAL_UART_2:
+       case BOOT_SERIAL_UART_3:
+       case BOOT_SERIAL_UART_4:
+       case BOOT_SERIAL_UART_5:
+       case BOOT_SERIAL_UART_6:
+       case BOOT_SERIAL_UART_7:
+       case BOOT_SERIAL_UART_8:
+               return BOOT_DEVICE_UART;
+       case BOOT_SERIAL_USB_OTG:
+               return BOOT_DEVICE_USB;
+       case BOOT_FLASH_NAND_FMC:
+               return BOOT_DEVICE_NAND;
+       case BOOT_FLASH_NOR_QSPI:
+               return BOOT_DEVICE_SPI;
        }
 
        return BOOT_DEVICE_MMC1;