]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mips: octeon: dts/dtsi: Change UART DT node to use clocks property
authorAaron Williams <awilliams@marvell.com>
Wed, 7 Apr 2021 07:12:39 +0000 (09:12 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Fri, 23 Apr 2021 19:22:55 +0000 (21:22 +0200)
We already have a clock driver for MIPS Octeon. This patch changes the
Octeon DT nodes to supply the clock property via the clock driver
instead of using an hard-coded value, which is not correct in all cases.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
arch/mips/dts/mrvl,cn73xx.dtsi
arch/mips/dts/mrvl,octeon-ebb7304.dts

index 83e5cde044a7dc85d3e2625ca38188fc3040b4c8..2a17f7a6a63ea7f08205caa17bae78b6107517ff 100644 (file)
@@ -97,6 +97,7 @@
                uart0: serial@1180000000800 {
                        compatible = "cavium,octeon-3860-uart","ns16550";
                        reg = <0x11800 0x00000800 0x0 0x400>;
+                       clocks = <&clk OCTEON_CLK_IO>;
                        clock-frequency = <0>;
                        current-speed = <115200>;
                        reg-shift = <3>;
                uart1: serial@1180000000c00 {
                        compatible = "cavium,octeon-3860-uart","ns16550";
                        reg = <0x11800 0x00000c00 0x0 0x400>;
+                       clocks = <&clk OCTEON_CLK_IO>;
                        clock-frequency = <0>;
                        current-speed = <115200>;
                        reg-shift = <3>;
index 1bb34e1329f1c12437d20ea5cc613d9ec4477b0b..b95c18d344823a463b8ed00cca8854f4734c37b7 100644 (file)
        };
 };
 
-&uart0 {
-       clock-frequency = <1200000000>;
-};
-
 &i2c0 {
        u-boot,dm-pre-reloc;    /* Needed early for DDR SPD EEPROM */
        clock-frequency = <100000>;