#define QIXIS_ESDHC_NO_ADAPTER 0x7
#endif
+/*
+ * implementation of CONFIG_ESDHC_DETECT_QUIRK Macro.
+ */
+static inline u8 qixis_esdhc_detect_quirk(void)
+{
+ /*
+ * SDHC1 Card ID:
+ * Specifies the type of card installed in the SDHC1 adapter slot.
+ * 000= (reserved)
+ * 001= eMMC V4.5 adapter is installed.
+ * 010= SD/MMC 3.3V adapter is installed.
+ * 011= eMMC V4.4 adapter is installed.
+ * 100= eMMC V5.0 adapter is installed.
+ * 101= MMC card/Legacy (3.3V) adapter is installed.
+ * 110= SDCard V2/V3 adapter installed.
+ * 111= no adapter is installed.
+ */
+ return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) !=
+ QIXIS_ESDHC_NO_ADAPTER);
+}
+
#endif
}
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
-/*
- * implementation of CONFIG_ESDHC_DETECT_QUIRK Macro.
- */
-u8 qixis_esdhc_detect_quirk(void)
-{
- /*
- * SDHC1 Card ID:
- * Specifies the type of card installed in the SDHC1 adapter slot.
- * 000= (reserved)
- * 001= eMMC V4.5 adapter is installed.
- * 010= SD/MMC 3.3V adapter is installed.
- * 011= eMMC V4.4 adapter is installed.
- * 100= eMMC V5.0 adapter is installed.
- * 101= MMC card/Legacy (3.3V) adapter is installed.
- * 110= SDCard V2/V3 adapter installed.
- * 111= no adapter is installed.
- */
- return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) !=
- QIXIS_ESDHC_NO_ADAPTER);
-}
-
static void esdhc_adapter_card_ident(void)
{
u8 card_id, val;
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_I2C_EARLY_INIT=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FSL_IFC=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
+CONFIG_ESDHC_DETECT_QUIRK=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
depends on FSL_ESDHC
default 1
+config ESDHC_DETECT_QUIRK
+ bool "QIXIS-based eSDHC quirk detection"
+ depends on FSL_ESDHC && FSL_QIXIS
+
config FSL_ESDHC_IMX
bool "Freescale/NXP i.MX eSDHC controller support"
help
#include <linux/iopoll.h>
#include <linux/dma-mapping.h>
#include <sdhci.h>
+#include "../../board/freescale/common/qixis.h"
DECLARE_GLOBAL_DATA_PTR;
struct fsl_esdhc *regs = priv->esdhc_regs;
#ifdef CONFIG_ESDHC_DETECT_QUIRK
- if (CONFIG_ESDHC_DETECT_QUIRK)
+ if (qixis_esdhc_detect_quirk())
return 1;
#endif
if (esdhc_read32(®s->prsstat) & PRSSTAT_CINS)
#define CONFIG_FSL_MEMAC
-/* MMC */
-#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
- QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
-
#define COMMON_ENV \
"kernelheader_addr_r=0x80200000\0" \
"fdtheader_addr_r=0x80100000\0" \
*/
#define FSL_QIXIS_BRDCFG9_QSPI 0x1
-/*
- * MMC
- */
-#ifdef CONFIG_MMC
-#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
- QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
-#endif
-
/*
* RTC configuration
*/
/* RTC */
#define CONFIG_SYS_RTC_BUS_NUM 0
-/*
- * MMC
- */
-#ifdef CONFIG_MMC
-#ifndef __ASSEMBLY__
-u8 qixis_esdhc_detect_quirk(void);
-#endif
-#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk()
-#endif
-
/* MAC/PHY configuration */
/* EEPROM */
/* RTC */
#define CONFIG_SYS_RTC_BUS_NUM 0
-/*
- * MMC
- */
-#ifdef CONFIG_MMC
-#ifndef __ASSEMBLY__
-u8 qixis_esdhc_detect_quirk(void);
-#endif
-#define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk()
-#endif
-
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0