/* TIVA boot control */
MX28_PAD_GPMI_RDY3__GPIO_0_23 | MUX_CONFIG_BOOT, /* TIVA0 */
MX28_PAD_GPMI_WRN__GPIO_0_25 | MUX_CONFIG_BOOT, /* TIVA1 */
+
+ /* HW revision ID Base Board */
+ MX28_PAD_LCD_D12__GPIO_1_12,
+ MX28_PAD_LCD_D13__GPIO_1_13,
+ MX28_PAD_LCD_D14__GPIO_1_14,
+
+ /* HW revision ID (SoM) */
+ MX28_PAD_LCD_D15__GPIO_1_15,
+ MX28_PAD_LCD_D16__GPIO_1_16,
+ MX28_PAD_LCD_D17__GPIO_1_17,
+ MX28_PAD_LCD_D18__GPIO_1_18,
};
u32 mxs_dram_vals[] = {
return !boot_tiva0 || !boot_tiva1;
}
#else
+/*
+ * Reading the HW ID number for XEA SoM module
+ *
+ * GPIOs from Port 1 (GPIO1_15, GPIO1_16, GPIO1_17 and GPIO1_18)
+ * are used to store HW revision information.
+ * Reading of GPIOs values is performed before the Device Model is
+ * bring up as the proper DTB needs to be chosen first.
+ *
+ * Moreover, this approach is required as "single binary" configuration
+ * of U-Boot (imx28_xea_sb_defconfig) is NOT using SPL framework, so
+ * only minimal subset of functionality is provided when ID is read.
+ *
+ * Hence, the direct registers' access.
+ */
+#define XEA_SOM_HW_ID_GPIO_PORT (MXS_PINCTRL_BASE + (0x0900 + ((1) * 0x10)))
+#define XEA_SOM_REV_MASK GENMASK(18, 15)
+#define XEA_SOM_REV_SHIFT 15
+
+static u8 get_som_rev(void)
+{
+ struct mxs_register_32 *reg =
+ (struct mxs_register_32 *)XEA_SOM_HW_ID_GPIO_PORT;
+
+ u32 tmp = ~readl(®->reg);
+ u8 id = (tmp & XEA_SOM_REV_MASK) >> XEA_SOM_REV_SHIFT;
+
+ return id;
+}
int board_early_init_f(void)
{
return 0;
}
+#if defined(CONFIG_BOARD_LATE_INIT)
+int board_late_init(void)
+{
+ int ret = env_set_ulong("board_som_rev", get_som_rev());
+
+ if (ret)
+ printf("Cannot set XEA's SoM revision env variable!\n");
+
+ return 0;
+}
+#endif
+
+#if defined(CONFIG_DISPLAY_BOARDINFO)
+int checkboard(void)
+{
+ printf("Board: LWE XEA SoM HW rev %d\n", get_som_rev());
+
+ return 0;
+}
+#endif
+
int dram_init(void)
{
return mxs_dram_init();