board: ti: am574x-idk: Add ddr data support

AM574x-idk has the following DDR parts attached:
EMIF1: MT41K256M16HA (1GB with ECC)
EMIF2: MT41K256M16HA (1GB without ECC)

Enabling 2GB DDR without interleaving between EMIFs. And
enabling ECC on EMIF1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>

diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 2d14ae54fe7619311d5a8ce05727b1e9e4711393..1377c7b1fe0ebe574448f26b2e33e88297d71b81 100644 (file)
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -89,10 +89,18 @@ static const struct dmm_lisa_map_regs am571x_idk_lisa_regs = {
        .is_ma_present  = 0x1
 };
 
+static const struct dmm_lisa_map_regs am574x_idk_lisa_regs = {
+       .dmm_lisa_map_2 = 0xc0600200,
+       .dmm_lisa_map_3 = 0x80600100,
+       .is_ma_present  = 0x1
+};
+
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
 {
        if (board_is_am571x_idk())
                *dmm_lisa_regs = &am571x_idk_lisa_regs;
+       else if (board_is_am574x_idk())
+               *dmm_lisa_regs = &am574x_idk_lisa_regs;
        else
                *dmm_lisa_regs = &beagle_x15_lisa_regs;
 }
@@ -231,8 +239,8 @@ static const struct emif_regs am571x_emif1_ddr3_666mhz_emif_regs = {
        .ref_ctrl                       = 0x0000514d,
        .ref_ctrl_final                 = 0x0000144a,
        .sdram_tim1                     = 0xd333887c,
-       .sdram_tim2                     = 0x40b37fe3,
-       .sdram_tim3                     = 0x409f8ada,
+       .sdram_tim2                     = 0x30b37fe3,
+       .sdram_tim3                     = 0x409f8ad8,
        .read_idle_ctrl                 = 0x00050000,
        .zq_config                      = 0x5007190b,
        .temp_alert_config              = 0x00000000,
@@ -249,17 +257,50 @@ static const struct emif_regs am571x_emif1_ddr3_666mhz_emif_regs = {
        .emif_rd_wr_exec_thresh         = 0x00000305
 };
 
+static const struct emif_regs am574x_emif1_ddr3_666mhz_emif_ecc_regs = {
+       .sdram_config_init              = 0x61863332,
+       .sdram_config                   = 0x61863332,
+       .sdram_config2                  = 0x08000000,
+       .ref_ctrl                       = 0x0000514d,
+       .ref_ctrl_final                 = 0x0000144a,
+       .sdram_tim1                     = 0xd333887c,
+       .sdram_tim2                     = 0x30b37fe3,
+       .sdram_tim3                     = 0x409f8ad8,
+       .read_idle_ctrl                 = 0x00050000,
+       .zq_config                      = 0x5007190b,
+       .temp_alert_config              = 0x00000000,
+       .emif_ddr_phy_ctlr_1_init       = 0x0024400f,
+       .emif_ddr_phy_ctlr_1            = 0x0e24400f,
+       .emif_ddr_ext_phy_ctrl_1        = 0x10040100,
+       .emif_ddr_ext_phy_ctrl_2        = 0x00910091,
+       .emif_ddr_ext_phy_ctrl_3        = 0x00950095,
+       .emif_ddr_ext_phy_ctrl_4        = 0x009b009b,
+       .emif_ddr_ext_phy_ctrl_5        = 0x009e009e,
+       .emif_rd_wr_lvl_rmp_win         = 0x00000000,
+       .emif_rd_wr_lvl_rmp_ctl         = 0x80000000,
+       .emif_rd_wr_lvl_ctl             = 0x00000000,
+       .emif_rd_wr_exec_thresh         = 0x00000305,
+       .emif_ecc_ctrl_reg              = 0xD0000001,
+       .emif_ecc_address_range_1       = 0x3FFF0000,
+       .emif_ecc_address_range_2       = 0x00000000
+};
+
 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
 {
        switch (emif_nr) {
        case 1:
                if (board_is_am571x_idk())
                        *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
+               else if (board_is_am574x_idk())
+                       *regs = &am574x_emif1_ddr3_666mhz_emif_ecc_regs;
                else
                        *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs;
                break;
        case 2:
-               *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs;
+               if (board_is_am574x_idk())
+                       *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
+               else
+                       *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs;
                break;
        }
 }