#include <configs/omap1510.h>
-/*
- * High Level Configuration Options
- * (easy to change)
- */
#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP1510 1 /* which is in a 5910 */
/* Input clock of PLL */
-#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
-#define CONFIG_XTAL_FREQ 12000000
+#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz */
+#define CONFIG_XTAL_FREQ 12000000 /* 12MHz */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/*
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM_1 0x10000000
+#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
+#define PHYS_FLASH_1 0x00000000
#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
* Environment settings
*/
#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR 0x4000
-#define CONFIG_ENV_SIZE (8 * 1024)
-#define CONFIG_ENV_SECT_SIZE (8 * 1024)
-#define CONFIG_ENV_ADDR_REDUND 0x6000
-#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
+#define CONFIG_ENV_ADDR 0x4000
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_SECT_SIZE (8 * 1024)
+#define CONFIG_ENV_ADDR_REDUND 0x6000
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#define CONFIG_ENV_OVERWRITE
/*
* Size of malloc() pool
*/
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/*
* The stack size is set up in start.S using the settings below
*/
-#define CONFIG_STACKSIZE (1 * 1024 * 1024) /* regular stack */
+#define CONFIG_STACKSIZE (1 * 1024 * 1024)
/*
* Hardware drivers
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
-#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
+#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ)
+#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE
#define CONFIG_NET_MULTI
#define CONFIG_SMC91111
/*#define CONFIG_SKIP_LOWLEVEL_INIT */
/*
- * partitions (mtdparts command line support)
+ * Partitions (mtdparts command line support)
*/
#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=gen_nand.0"
#define MTDPARTS_DEFAULT "mtdparts=" \
"gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
/*
- * Command line configuration.
+ * Command line configuration
*/
#define CONFIG_CMD_BDI
#define CONFIG_CMD_BOOTD
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "# "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
- (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
+ (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
-#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x400000)
/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
* This time is further subdivided by a local divisor.
#define CONFIG_SYS_PTV 7
#define CONFIG_SYS_HZ 1000
-#define OMAP5910_DPLL_DIV 1
-#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
- (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
+#define OMAP5910_DPLL_DIV 1
+#define OMAP5910_DPLL_MUL \
+ ((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
#define OMAP5910_LCD_DIV 2 /* CKL/4 */
#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
-#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */
+#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b */
#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
(OMAP5910_LCD_DIV << 2) | \
(OMAP5910_ARM_DIV << 4) | \
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