help
Set the address used for reading and writing the boot counter.
+config SYS_BOOTCOUNT_MAGIC
+ hex "Magic value for the boot counter"
+ default 0xB001C041
+ help
+ Set the magic value used for the boot counter.
+
endif
uintptr_t flush_end;
#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD)
- raw_bootcount_store(reg, (BOOTCOUNT_MAGIC & 0xffff0000) | a);
+ raw_bootcount_store(reg, (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000) | a);
flush_end = roundup(CONFIG_SYS_BOOTCOUNT_ADDR + 4,
CONFIG_SYS_CACHELINE_SIZE);
#else
raw_bootcount_store(reg, a);
- raw_bootcount_store(reg + 4, BOOTCOUNT_MAGIC);
+ raw_bootcount_store(reg + 4, CONFIG_SYS_BOOTCOUNT_MAGIC);
flush_end = roundup(CONFIG_SYS_BOOTCOUNT_ADDR + 8,
CONFIG_SYS_CACHELINE_SIZE);
#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD)
u32 tmp = raw_bootcount_load(reg);
- if ((tmp & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+ if ((tmp & 0xffff0000) != (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000))
return 0;
else
return (tmp & 0x0000ffff);
#else
- if (raw_bootcount_load(reg + 4) != BOOTCOUNT_MAGIC)
+ if (raw_bootcount_load(reg + 4) != CONFIG_SYS_BOOTCOUNT_MAGIC)
return 0;
else
return raw_bootcount_load(reg);
#include <asm/arch/at91_gpbr.h>
/*
- * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register.
- * This is done so we need to use only one of the four GPBR registers.
+ * We combine the CONFIG_SYS_BOOTCOUNT_MAGIC and bootcount in one 32-bit
+ * register. This is done so we need to use only one of the four GPBR
+ * registers.
*/
void bootcount_store(ulong a)
{
at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
- writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
- &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
+ writel((CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
+ &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
}
ulong bootcount_load(void)
at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
- if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+ if ((val & 0xffff0000) != (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000))
return 0;
else
return val & 0x0000ffff;
writel(RTC_KICK0R_WE, ®->kick0r);
writel(RTC_KICK1R_WE, ®->kick1r);
raw_bootcount_store(®->scratch2,
- (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff));
+ (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff));
}
ulong bootcount_load(void)
(struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
val = raw_bootcount_load(®->scratch2);
- if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+ if ((val & 0xffff0000) != (CONFIG_SYS_BOOTCOUNT_MAGIC & 0xffff0000))
return 0;
else
return val & 0x0000ffff;
size += gd->bd->bi_dram[i].size;
save_addr = (ulong *)(size - BOOTCOUNT_ADDR);
writel(a, save_addr);
- writel(BOOTCOUNT_MAGIC, &save_addr[1]);
+ writel(CONFIG_SYS_BOOTCOUNT_MAGIC, &save_addr[1]);
for (i = 0; i < REPEAT_PATTERN; i++)
writel(patterns[i % NBR_OF_PATTERNS],
uint dpram_alloc_align(uint size,uint align);
void bootcount_store (ulong);
ulong bootcount_load (void);
-#define BOOTCOUNT_MAGIC 0xB001C041
/* $(CPU)/.../<eth> */
void mii_init (void);