]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
riscv: dts: Sync to Linux Kernel ae350 dts.
authorRick Chen <rick@andestech.com>
Tue, 13 Nov 2018 07:13:34 +0000 (15:13 +0800)
committerAndes <uboot@andestech.com>
Mon, 26 Nov 2018 05:57:44 +0000 (13:57 +0800)
Use same dts to boot U-Boot and Kernel.

Following are the change notes :
1 Remove early printk bootargs.
2 Timer frequency are changed to 60MHz.
3 Add dma, snd, lcd, virtio nodes which are used
  in kernel drivers. They does not been used by U-Boot.
4 Change spi irq from 3 to 4.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
arch/riscv/dts/ae350.dts

index 4717ae88bc0849efc316e11b9921acec16ef5933..e48c29864524a661f73e05a3b4939d5b4a326feb 100644 (file)
        };
 
        chosen {
-               bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7";
+               bootargs = "console=ttyS0,38400n8  debug loglevel=7";
                stdout-path = "uart0:38400n8";
        };
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-               timebase-frequency = <10000000>;
-
+               timebase-frequency = <60000000>;
                CPU0: cpu@0 {
                        device_type = "cpu";
                        reg = <0>;
@@ -29,7 +28,8 @@
                        riscv,isa = "rv64imafdc";
                        mmu-type = "riscv,sv39";
                        clock-frequency = <60000000>;
-
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <32>;
                        CPU0_intc: interrupt-controller {
                                #interrupt-cells = <1>;
                                interrupt-controller;
                #size-cells = <2>;
                compatible = "andestech,riscv-ae350-soc";
                ranges;
-       };
-
-       plmt0@e6000000 {
-               compatible = "riscv,plmt0";
-               interrupts-extended = <&CPU0_intc 7>;
-               reg = <0x0 0xe6000000 0x0 0x100000>;
-       };
 
        plic0: interrupt-controller@e4000000 {
                compatible = "riscv,plic0";
@@ -62,7 +55,7 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                reg = <0x0 0xe4000000 0x0 0x2000000>;
-               riscv,ndev=<31>;
+               riscv,ndev=<71>;
                interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>;
        };
 
                interrupts-extended = <&CPU0_intc 3>;
        };
 
+       plmt0@e6000000 {
+               compatible = "riscv,plmt0";
+                       interrupts-extended = <&CPU0_intc 7>;
+                       reg = <0x0 0xe6000000 0x0 0x100000>;
+               };
+       };
+
        spiclk: virt_100mhz {
                #clock-cells = <0>;
                compatible = "fixed-clock";
@@ -85,7 +85,7 @@
        timer0: timer@f0400000 {
                compatible = "andestech,atcpit100";
                reg = <0x0 0xf0400000 0x0 0x1000>;
-               clock-frequency = <40000000>;
+               clock-frequency = <60000000>;
                interrupts = <3 4>;
                interrupt-parent = <&plic0>;
        };
                interrupt-parent = <&plic0>;
        };
 
+       dma0: dma@f0c00000 {
+               compatible = "andestech,atcdmac300";
+               reg = <0x0 0xf0c00000 0x0 0x1000>;
+               interrupts = <10 4 64 4 65 4 66 4 67 4 68 4 69 4 70 4 71 4>;
+               dma-channels = <8>;
+               interrupt-parent = <&plic0>;
+       };
+
+       lcd0: lcd@e0200000 {
+               compatible = "andestech,atflcdc100";
+               reg = <0x0 0xe0200000 0x0 0x1000>;
+               interrupts = <20 4>;
+               interrupt-parent = <&plic0>;
+       };
+
        smc0: smc@e0400000 {
                compatible = "andestech,atfsmc020";
                reg = <0x0 0xe0400000 0x0 0x1000>;
        };
 
+       snd0: snd@f0d00000 {
+               compatible = "andestech,atfac97";
+               reg = <0x0 0xf0d00000 0x0 0x1000>;
+               interrupts = <17 4>;
+               interrupt-parent = <&plic0>;
+       };
+
+       virtio_mmio@fe007000 {
+               interrupts = <0x17 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe007000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
+       virtio_mmio@fe006000 {
+               interrupts = <0x16 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe006000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
+       virtio_mmio@fe005000 {
+               interrupts = <0x15 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe005000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
+       virtio_mmio@fe004000 {
+               interrupts = <0x14 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe004000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
+       virtio_mmio@fe003000 {
+               interrupts = <0x13 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe003000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
+       virtio_mmio@fe002000 {
+               interrupts = <0x12 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe002000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
+       virtio_mmio@fe001000 {
+               interrupts = <0x11 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe001000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
+       virtio_mmio@fe000000 {
+               interrupts = <0x10 0x4>;
+               interrupt-parent = <0x2>;
+               reg = <0x0 0xfe000000 0x0 0x1000>;
+               compatible = "virtio,mmio";
+       };
+
        nor@0,0 {
                compatible = "cfi-flash";
                reg = <0x0 0x88000000 0x0 0x1000>;
                #size-cells = <0>;
                num-cs = <1>;
                clocks = <&spiclk>;
-               interrupts = <3 4>;
+               interrupts = <4 4>;
                interrupt-parent = <&plic0>;
-
                flash@0 {
                        compatible = "spi-flash";
                        spi-max-frequency = <50000000>;