arm64: dts: ti: k3-am65: add mcu navss nodes

Add DT node for MCU NAVSS its components to get DMA working on AM654
SoC.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 143eb6d63092bb9c7e1f2a3dde85b0d165abe543..c5d23d0203abc755eea97b7b90405033ec9ce339 100644 (file)
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/pinctrl/k3-am65.h>
+#include <dt-bindings/dma/k3-udma.h>
 
 / {
        chosen {
@@ -63,6 +64,52 @@
                pinctrl-single,register-width = <32>;
                pinctrl-single,function-mask = <0xffffffff>;
        };
+
+       navss_mcu: navss-mcu {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               ti,sci-dev-id = <119>;
+
+               mcu_ringacc: ringacc@2b800000 {
+                       compatible = "ti,am654-navss-ringacc";
+                       reg =   <0x0 0x2b800000 0x0 0x400000>,
+                               <0x0 0x2b000000 0x0 0x400000>,
+                               <0x0 0x28590000 0x0 0x100>,
+                               <0x0 0x2a500000 0x0 0x40000>;
+                       reg-names = "rt", "fifos",
+                                   "proxy_gcfg", "proxy_target";
+                       ti,num-rings = <286>;
+                       ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+                       ti,dma-ring-reset-quirk;
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <195>;
+               };
+
+               mcu_udmap: udmap@285c0000 {
+                       compatible = "ti,k3-navss-udmap";
+                       reg =   <0x0 0x285c0000 0x0 0x100>,
+                               <0x0 0x2a800000 0x0 0x40000>,
+                               <0x0 0x2aa00000 0x0 0x40000>;
+                       reg-names = "gcfg", "rchanrt", "tchanrt";
+                       #dma-cells = <3>;
+
+                       ti,ringacc = <&mcu_ringacc>;
+                       ti,psil-base = <0x6000>;
+
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <194>;
+
+                       ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+                                               <0x2>; /* TX_CHAN */
+                       ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
+                                               <0x4>; /* RX_CHAN */
+                       ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
+                       dma-coherent;
+               };
+       };
 };
 
 &cbass_wakeup {