]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: rename stm32mp15xx-avenger96 ethernet0_rgmii_pins
authorPatrick Delaunay <patrick.delaunay@st.com>
Mon, 6 Jul 2020 11:26:51 +0000 (13:26 +0200)
committerPatrice Chotard <patrice.chotard@st.com>
Tue, 28 Jul 2020 16:06:19 +0000 (18:06 +0200)
Alignment with pins name used in Linux kernel v5.8.

It is a preleminary step for device tree alignment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
arch/arm/dts/stm32mp15-pinctrl.dtsi
arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts

index c385896ebcf192424960e8bc3033f1c8ecb77a5a..b0c2aa52f8c53d926b83e55be7b1c19dfa3abe93 100644 (file)
                };
        };
 
-       ethernet0_rgmii_pins_b: rgmii-1 {
+       ethernet0_rgmii_pins_c: rgmii-2 {
                pins1 {
                        pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
                                 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
                };
        };
 
-       ethernet0_rgmii_pins_sleep_b: rgmii-sleep-1 {
+       ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
                pins1 {
                        pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
                                 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
index c1cc80bcf55bc6086b7b89c04a49caacf6624761..88f25d89b223192d9124c5238973f778106adbfa 100644 (file)
@@ -89,8 +89,8 @@
 
 &ethernet0 {
        status = "okay";
-       pinctrl-0 = <&ethernet0_rgmii_pins_b>;
-       pinctrl-1 = <&ethernet0_rgmii_pins_sleep_b>;
+       pinctrl-0 = <&ethernet0_rgmii_pins_c>;
+       pinctrl-1 = <&ethernet0_rgmii_sleep_pins_c>;
        pinctrl-names = "default", "sleep";
        phy-mode = "rgmii";
        max-speed = <1000>;