In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
-- I2C Support: CONFIG_SYS_I2C
+- I2C Support: CONFIG_SYS_I2C_LEGACY
- This enable the NEW i2c subsystem, and will allow you to use
+ Note: This is deprecated in favour of driver model. Use
+ CONFIG_DM_I2C instead.
+
+ This enable the legacy i2c subsystem, and will allow you to use
i2c commands at the u-boot command line (as long as you set
CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
for defining speed and slave address
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
static void erratum_a009203(void)
{
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
u8 __iomem *ptr;
#ifdef I2C1_BASE_ADDR
ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
preloader_console_init();
spl_set_bd();
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
#ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init_all();
#endif
#define TZPC_BASE 0x02200000
#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_EARLY_INIT
#endif
#define SRDS_MAX_LANES 8
*/
#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
#ifndef CONFIG_SYS_I2C_SOFT
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#endif
#define CONFIG_SYS_I2C_SLAVE 0x0
env_relocate();
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all();
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
# Author: Igor Grinberg <grinberg@compulab.co.il>
obj-y += common.o
-obj-$(CONFIG_SYS_I2C) += eeprom.o
+obj-$(CONFIG_SYS_I2C_LEGACY) += eeprom.o
obj-$(CONFIG_LCD) += omap3_display.o
obj-$(CONFIG_SMC911X) += omap3_smc911x.o
#define _EEPROM_
#include <errno.h>
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
u32 cl_eeprom_get_board_rev(uint eeprom_bus);
int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);
env_relocate();
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all();
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
void reset_cpu(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
#else
/* only CA57 ? */
int board_early_init_f(void)
{
-#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif
#endif
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
static struct i2c_pads_info tqma6_i2c3_pads = {
/* I2C3: on board LM75, M24C64, */
.scl = {
#ifndef CONFIG_DM_SPI
tqma6_iomuxc_spi();
#endif
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
tqma6_setup_i2c();
#endif
printf("Cannot find RTC: err=%d\n", rcode);
return CMD_RET_FAILURE;
}
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
old_bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
#else
}
/* switch back to original I2C bus */
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_set_bus_num(old_bus);
#elif !defined(CONFIG_DM_RTC)
I2C_SET_BUS(old_bus);
/* I2C EEPROM */
#if CONFIG_IS_ENABLED(DM_I2C)
eeprom_i2c_bus = bus;
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
if (bus >= 0)
i2c_set_bus_num(bus);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
* pairs. The following macros take care of this */
#if defined(CONFIG_SYS_I2C_NOPROBES)
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
static struct
{
uchar bus;
#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
-#endif /* defined(CONFIG_SYS_I2C) */
+#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
#endif
#define DISP_LINE_LEN 16
*
* Returns I2C bus speed in Hz.
*/
-#if !defined(CONFIG_SYS_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
+#if !defined(CONFIG_SYS_I2C_LEGACY) && !CONFIG_IS_ENABLED(DM_I2C)
/*
* TODO: Implement architecture-specific get/set functions
* Should go away, if we switched completely to new multibus support
*
* Returns zero always.
*/
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
* Returns zero on success, CMD_RET_USAGE in case of misuse and negative
* on error.
*/
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
printf("Current bus is %d\n", bus_no);
} else {
bus_no = simple_strtoul(argv[1], NULL, 10);
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
printf("Invalid bus %d\n", bus_no);
return -1;
return ret ? CMD_RET_FAILURE : 0;
}
-#endif /* defined(CONFIG_SYS_I2C) */
+#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
/**
* do_i2c_bus_speed() - Handle the "i2c speed" command-line command
printf("Error: Not supported by the driver\n");
return CMD_RET_FAILURE;
}
-#elif defined(CONFIG_SYS_I2C)
+#elif defined(CONFIG_SYS_I2C_LEGACY)
i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
}
static struct cmd_tbl cmd_i2c_sub[] = {
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
#endif
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
#endif /* CONFIG_I2C_MULTI_BUS */
/***************************************************/
#ifdef CONFIG_SYS_LONGHELP
static char i2c_help_text[] =
-#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
"i2c " /* That's the prefix for the crc32 command below. */
#endif
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
"i2c dev [dev] - show or set current I2C bus\n"
#endif /* CONFIG_I2C_MULTI_BUS */
return 0;
}
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
static int init_func_i2c(void)
{
puts("I2C: ");
misc_init_f,
#endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
init_func_i2c,
#endif
#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
dev->name);
}
}
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all();
#endif
if (IS_ENABLED(CONFIG_DM_VIDEO)) {
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o
-obj-$(CONFIG_SYS_I2C) += i2c_core.o
+obj-$(CONFIG_SYS_I2C_LEGACY) += i2c_core.o
obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
*/
void *trace_buff;
#endif
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C_LEGACY)
/**
* @cur_i2c_bus: currently used I2C bus
*/
#endif
#if CONFIG_IS_ENABLED(DM_I2C)
-# ifdef CONFIG_SYS_I2C
-# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
+# ifdef CONFIG_SYS_I2C_LEGACY
+# error "Cannot define CONFIG_SYS_I2C_LEGACY when CONFIG_DM_I2C is used"
# endif
#endif
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_i2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_HOSTNAME "M5253DEMO"
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#endif
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_FSL_SERDES2 0xe3100
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
#define CONFIG_SYS_FSL_I2C3_SPEED 400000
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_MCFTMR
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_NS16550_COM1 0x44e09000
#define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif /* CONFIG_DM */
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
*/
/* I2C support */
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_PXA
#define CONFIG_PXA_STD_I2C
#define CONFIG_PXA_PWR_I2C
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 100000
/*
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
* I2C related stuff
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_FSL_USDHC_NUM 2
/* I2C config */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
/* I2C */
#define CONFIG_SYS_MAX_I2C_BUS 1
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
#define CONFIG_SYS_I2C_SOFT_SLAVE 0
/*
* Hardware drivers
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
/*
* I2C setup
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
#undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_NUM_I2C_BUSES 4
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_I2C_FSL
* I2C related stuff
*/
#undef CONFIG_I2C_MVTWSI
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_INIT_BOARD
/*
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_NFS_TIMEOUT 10000UL
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SH
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
/*
* I2C Configuration
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
* I2C
*/
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
/* Serial Port */
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
/* Serial Port */
* I2C
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_MXC_USB_FLAGS 0
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_FSL_USDHC_NUM 2
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#endif
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_MXC_UART_BASE UART2_BASE
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#endif
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
/* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_MXC_I2C2
#undef CONFIG_DM_MMC
#undef CONFIG_DM_PMIC
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* I2C Configuration */
#define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
#endif
/* I2C - Bit-bashed */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
* I2C
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_I2C_MULTI_BUS
/*
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
#define CONFIG_SYS_I2C_MVTWSI
#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#endif
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
/* EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
*/
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
/* If DM_I2C, enable non-DM I2C support */
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_I2C
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif
/*
#ifdef CONFIG_SPL_BUILD
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
-#undef CONFIG_SYS_I2C
+#undef CONFIG_SYS_I2C_LEGACY
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
#define CONFIG_SYS_BOOTCOUNT_BE
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#endif /* __CONFIG_TQMA6_WRU4_H */
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_MXC_USB_FLAGS 0
/* I2C */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_FEC_MXC_PHYADDR 0
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* I2C Configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
* I2C driver
*/
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 350000
/*
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
/* I2C configs */
-#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
/*
* For now there are essentially two parts to this file - driver model
- * here at the top, and the older code below (with CONFIG_SYS_I2C being
+ * here at the top, and the older code below (with CONFIG_SYS_I2C_LEGACY being
* most recent). The plan is to migrate everything to driver model.
* The driver model structures and API are separate as they are different
* enough as to be incompatible for compilation purposes.
void i2c_init(int speed, int slaveaddr);
void i2c_init_board(void);
-#ifdef CONFIG_SYS_I2C
+#ifdef CONFIG_SYS_I2C_LEGACY
/*
* i2c_get_bus_num:
*
*/
unsigned int i2c_get_bus_speed(void);
-#endif /* CONFIG_SYS_I2C */
+#endif /* CONFIG_SYS_I2C_LEGACY */
/*
* only for backwardcompatibility, should go away if we switched
* completely to new multibus support.
*/
-#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
+#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
# if !defined(CONFIG_SYS_MAX_I2C_BUS)
# define CONFIG_SYS_MAX_I2C_BUS 2
# endif
CONFIG_SYS_HRCW_HIGH
CONFIG_SYS_HRCW_LOW
CONFIG_SYS_HZ_CLOCK
-CONFIG_SYS_I2C
CONFIG_SYS_I2C2_FSL_OFFSET
CONFIG_SYS_I2C2_OFFSET
CONFIG_SYS_I2C2_PINMUX_CLR
CONFIG_SYS_I2C_IHS_SPEED_3_1
CONFIG_SYS_I2C_INIT_BOARD
CONFIG_SYS_I2C_LDI_ADDR
+CONFIG_SYS_I2C_LEGACY
CONFIG_SYS_I2C_LPC32XX_SLAVE
CONFIG_SYS_I2C_LPC32XX_SPEED
CONFIG_SYS_I2C_MAC1_BUS