serial: sh: Add RZ/A1 support

Add support for RZ/A1 SoC specifics.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index e6fe5c7c67770ae496e2c3f1997ecc30d6381a8e..8f52f9dce4851ff1d0dedbd9fb1e418584647d5d 100644 (file)
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -62,6 +62,9 @@ static void sh_serial_init_generic(struct uart_port *port)
        sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
        sci_in(port, SCFCR);
        sci_out(port, SCFCR, 0);
+#if defined(CONFIG_RZA1)
+       sci_out(port, SCSPTR, 0x0003);
+#endif
 }
 
 static void

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 887dd19ff58e21e3f9a7f48792278710599b3807..8aa80d4a371153cc127bd8cf15f44f87272a3a43 100644 (file)
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -195,7 +195,7 @@ struct uart_port {
 #  define SCSPTR7 0xfffeB820 /* 16 bit SCIF */
 # endif
 # define SCSCR_INIT(port)      0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-#elif defined(CONFIG_CPU_SH7269)
+#elif defined(CONFIG_CPU_SH7269) || defined(CONFIG_RZA1)
 # define SCSPTR0 0xe8007020 /* 16 bit SCIF */
 # define SCSPTR1 0xe8007820 /* 16 bit SCIF */
 # define SCSPTR2 0xe8008020 /* 16 bit SCIF */
@@ -205,6 +205,7 @@ struct uart_port {
 # define SCSPTR6 0xe800a020 /* 16 bit SCIF */
 # define SCSPTR7 0xe800a820 /* 16 bit SCIF */
 # define SCSCR_INIT(port)      0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
+# define SCIF_ORER 0x0001  /* overrun error bit */
 #elif defined(CONFIG_CPU_SH7619)
 # define SCSPTR0 0xf8400020 /* 16 bit SCIF */
 # define SCSPTR1 0xf8410020 /* 16 bit SCIF */