watchdog: armada_37xx: Probe driver also when watchdog is already running

If Armada 37xx watchdog is started before U-Boot then CNTR_CTRL_ACTIVE bit
is set, U-Boot armada-37xx-wdt.c driver fails to initialize and so U-Boot
is unable to use or kick this watchdog.

Do not check for CNTR_CTRL_ACTIVE bit and always initialize watchdog. Same
behavior is implemented in Linux kernel driver.

This change allows to activate watchdog in firmware which loads U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>

diff --git a/drivers/watchdog/armada-37xx-wdt.c b/drivers/watchdog/armada-37xx-wdt.c
index 2e119b9b5aadf3ce544abccf3d4bc9970d4119b2..bacebbc7926a76567c0e2dfc23cda9e5ca5d214a 100644 (file)
--- a/drivers/watchdog/armada-37xx-wdt.c
+++ b/drivers/watchdog/armada-37xx-wdt.c
@@ -58,13 +58,11 @@ static void counter_disable(struct a37xx_wdt *priv, int id)
        clrbits_le32(priv->reg + CNTR_CTRL(id), CNTR_CTRL_ENABLE);
 }
 
-static int init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src)
+static void init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src)
 {
        u32 reg;
 
        reg = readl(priv->reg + CNTR_CTRL(id));
-       if (reg & CNTR_CTRL_ACTIVE)
-               return -EBUSY;
 
        reg &= ~(CNTR_CTRL_MODE_MASK | CNTR_CTRL_PRESCALE_MASK |
                 CNTR_CTRL_TRIG_SRC_MASK);
@@ -79,8 +77,6 @@ static int init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src)
        reg |= trig_src;
 
        writel(reg, priv->reg + CNTR_CTRL(id));
-
-       return 0;
 }
 
 static int a37xx_wdt_reset(struct udevice *dev)
@@ -116,16 +112,9 @@ static int a37xx_wdt_expire_now(struct udevice *dev, ulong flags)
 static int a37xx_wdt_start(struct udevice *dev, u64 ms, ulong flags)
 {
        struct a37xx_wdt *priv = dev_get_priv(dev);
-       int err;
-
-       err = init_counter(priv, 0, CNTR_CTRL_MODE_ONESHOT, 0);
-       if (err < 0)
-               return err;
 
-       err = init_counter(priv, 1, CNTR_CTRL_MODE_HWSIG,
-                          CNTR_CTRL_TRIG_SRC_PREV_CNTR);
-       if (err < 0)
-               return err;
+       init_counter(priv, 0, CNTR_CTRL_MODE_ONESHOT, 0);
+       init_counter(priv, 1, CNTR_CTRL_MODE_HWSIG, CNTR_CTRL_TRIG_SRC_PREV_CNTR);
 
        priv->timeout = ms * priv->clk_rate / 1000 / CNTR_CTRL_PRESCALE_MIN;