// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2021
- * Tony Dinh <mibodhi@gmail.com>
- * Suriyan Ramasami <suriyan.r@gmail.com>
- *
- * Copyright (C) 2013 Suriyan Ramasami <suriyan.r@gmail.com>
+ * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com>
+ * Copyright (C) 2013-2021 Suriyan Ramasami <suriyan.r@gmail.com>
*
* Based on dockstar.c originally written by
* Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
#include <common.h>
#include <bootstage.h>
#include <init.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
#include <asm/global_data.h>
#include <asm/mach-types.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include <asm/arch/cpu.h>
#include <asm/io.h>
+#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
+int board_eth_init(struct bd_info *bis)
+{
+ return cpu_eth_init(bis);
+}
+
int board_init(void)
{
/*
return 0;
}
-static int fdt_get_phy_addr(const char *path)
-{
- const void *fdt = gd->fdt_blob;
- const u32 *reg;
- const u32 *val;
- int node, phandle, addr;
-
- /* Find the node by its full path */
- node = fdt_path_offset(fdt, path);
- if (node >= 0) {
- /* Look up phy-handle */
- val = fdt_getprop(fdt, node, "phy-handle", NULL);
- if (val) {
- phandle = fdt32_to_cpu(*val);
- if (!phandle)
- return -1;
- /* Follow it to its node */
- node = fdt_node_offset_by_phandle(fdt, phandle);
- if (node) {
- /* Look up reg */
- reg = fdt_getprop(fdt, node, "reg", NULL);
- if (reg) {
- addr = fdt32_to_cpu(*reg);
- return addr;
- }
- }
- }
- }
- return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
-{
- u16 reg;
- int phyaddr;
- char *name = "ethernet-controller@72000";
- char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
-
- if (miiphy_set_current_dev(name))
- return;
-
- phyaddr = fdt_get_phy_addr(eth0_path);
- if (phyaddr < 0)
- return;
-
- /*
- * Enable RGMII delay on Tx and Rx for CPU port
- * Ref: sec 4.7.2 of chip datasheet
- */
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
- miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®);
- reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
- miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
-
- /* reset the phy */
- miiphy_reset(name, phyaddr);
-
- printf("88E1116 Initialized on %s\n", name);
-}
-#endif /* CONFIG_RESET_PHY_R */
-
#if CONFIG_IS_ENABLED(BOOTSTAGE)
-#define GREEN_LED (1 << 14)
-#define ORANGE_LED (1 << 15)
+#define GREEN_LED BIT(14)
+#define ORANGE_LED BIT(15)
#define BOTH_LEDS (GREEN_LED | ORANGE_LED)
#define NEITHER_LED 0
/* SPDX-License-Identifier: GPL-2.0+ */
/*
+ * Copyright (C) 2022 Tony Dinh <mibodhi@gmai.com>
* Copyright (C) 2013 Suriyan Ramasami <suriyan.r@gmail.com>
*
* Based on dockstar.h originally written by
#ifndef _CONFIG_GOFLEXHOME_H
#define _CONFIG_GOFLEXHOME_H
+#include <linux/bitops.h>
+
/*
* Default GPIO configuration and LED status
*/
#define GOFLEXHOME_OE_LOW (~(0))
#define GOFLEXHOME_OE_HIGH (~(0))
-#define GOFLEXHOME_OE_VAL_LOW (1 << 29) /* USB_PWEN low */
-#define GOFLEXHOME_OE_VAL_HIGH (1 << 17) /* LED pin high */
-
-/* PHY related */
-#define MV88E1116_LED_FCTRL_REG 10
-#define MV88E1116_CPRSP_CR3_REG 21
-#define MV88E1116_MAC_CTRL_REG 21
-#define MV88E1116_PGADR_REG 22
-#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
+#define GOFLEXHOME_OE_VAL_LOW BIT(29) /* USB_PWEN low */
+#define GOFLEXHOME_OE_VAL_HIGH BIT(17) /* LED pin high */
#include "mv-common.h"
-/*
- * Environment variables configurations
- */
-/*
- * max 4k env size is enough, but in case of nand
- * it has to be rounded to sector size
- */
-
/*
* Default environment variables
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=console=ttyS0,115200\0" \
"mtdids=nand0=orion_nand\0" \
- "mtdparts="CONFIG_MTDPARTS_DEFAULT \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT \
"kernel=/boot/uImage\0" \
"bootargs_root=ubi.mtd=root root=ubi0:root rootfstype=ubifs ro\0"
/*
* Ethernet Driver configuration
*/
-#ifdef CONFIG_CMD_NET
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
-#endif /* CONFIG_CMD_NET */
+#ifdef CONFIG_RESET_PHY_R
+#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */
+#endif
/* SATA driver configuration */
-#ifdef CONFIG_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_LBA48
-#endif /* CONFIG_SATA */
#endif /* _CONFIG_GOFLEXHOME_H */