ARM: dts: renesas: Add R8A779A0 V3U Falcon DTs

Import R8A779A0 V3U Falcon DTs from Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

diff --git a/arch/arm/dts/r8a779a0-falcon-cpu.dtsi b/arch/arm/dts/r8a779a0-falcon-cpu.dtsi
new file mode 100644 (file)
index 0000000..fa284a7
--- /dev/null
+++ b/arch/arm/dts/r8a779a0-falcon-cpu.dtsi
@@ -0,0 +1,184 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Falcon CPU board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "r8a779a0.dtsi"
+
+/ {
+       model = "Renesas Falcon CPU board";
+       compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
+
+       memory@48000000 {
+               device_type = "memory";
+               /* first 128MB is reserved for secure area. */
+               reg = <0x0 0x48000000 0x0 0x78000000>;
+       };
+
+       memory@500000000 {
+               device_type = "memory";
+               reg = <0x5 0x00000000 0x0 0x80000000>;
+       };
+
+       memory@600000000 {
+               device_type = "memory";
+               reg = <0x6 0x00000000 0x0 0x80000000>;
+       };
+
+       memory@700000000 {
+               device_type = "memory";
+               reg = <0x7 0x00000000 0x0 0x80000000>;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
+
+&avb0 {
+       pinctrl-0 = <&avb0_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&phy0>;
+       tx-internal-delay-ps = <2000>;
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+       };
+};
+
+&extal_clk {
+       clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+       clock-frequency = <32768>;
+};
+
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+};
+
+&i2c1 {
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+};
+
+&i2c6 {
+       pinctrl-0 = <&i2c6_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+};
+
+&mmc0 {
+       pinctrl-0 = <&mmc_pins>;
+       pinctrl-1 = <&mmc_pins>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       bus-width = <8>;
+       no-sd;
+       no-sdio;
+       non-removable;
+       full-pwr-cycle-in-suspend;
+       status = "okay";
+};
+
+&pfc {
+       pinctrl-0 = <&scif_clk_pins>;
+       pinctrl-names = "default";
+
+       avb0_pins: avb0 {
+               mux {
+                       groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
+                       function = "avb0";
+               };
+
+               pins_mdio {
+                       groups = "avb0_mdio";
+                       drive-strength = <21>;
+               };
+
+               pins_mii {
+                       groups = "avb0_rgmii";
+                       drive-strength = <21>;
+               };
+
+       };
+
+       i2c0_pins: i2c0 {
+               groups = "i2c0";
+               function = "i2c0";
+       };
+
+       i2c1_pins: i2c1 {
+               groups = "i2c1";
+               function = "i2c1";
+       };
+
+       i2c6_pins: i2c6 {
+               groups = "i2c6";
+               function = "i2c6";
+       };
+
+       mmc_pins: mmc {
+               groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+               function = "mmc";
+               power-source = <1800>;
+       };
+
+       scif0_pins: scif0 {
+               groups = "scif0_data", "scif0_ctrl";
+               function = "scif0";
+       };
+
+       scif_clk_pins: scif_clk {
+               groups = "scif_clk";
+               function = "scif_clk";
+       };
+};
+
+&scif0 {
+       pinctrl-0 = <&scif0_pins>;
+       pinctrl-names = "default";
+
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&scif_clk {
+       clock-frequency = <24000000>;
+};

diff --git a/arch/arm/dts/r8a779a0-falcon.dts b/arch/arm/dts/r8a779a0-falcon.dts
new file mode 100644 (file)
index 0000000..5617b81
--- /dev/null
+++ b/arch/arm/dts/r8a779a0-falcon.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Falcon CPU and BreakOut boards
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a779a0-falcon-cpu.dtsi"
+
+/ {
+       model = "Renesas Falcon CPU and Breakout boards based on r8a779a0";
+       compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
+
+       aliases {
+               ethernet0 = &avb0;
+               serial0 = &scif0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+};
+
+&rwdt {
+       timeout-sec = <60>;
+       status = "okay";
+};