ARM: rmobile: Clean up ad-hoc clock macros

As we have a proper clock framework driver, these macros are not
needed, so drop them and clean up the whitelist.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index 805c0c254e7bf24ed4fbd458e36dd42ba2f09c3f..740e0517beaba86392a6e6b3863e913c1cbda65b 100644 (file)
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -17,7 +17,6 @@
 /* SCIF */
 #define CONFIG_CONS_SCIF2
 #define CONFIG_CONS_INDEX      2
-#define CONFIG_SH_SCIF_CLK_FREQ        CONFIG_S3D4_CLK_FREQ
 
 /* [A] Hyper Flash */
 /* use to RPC(SPI Multi I/O Bus Controller) */
@@ -28,14 +27,7 @@
 
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
-#define RCAR_XTAL_CLK          33333333u
-#define CONFIG_SYS_CLK_FREQ    RCAR_XTAL_CLK
-/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
-/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz          */
-#define CONFIG_CP_CLK_FREQ     (CONFIG_SYS_CLK_FREQ / 2)
-#define CONFIG_PLL1_CLK_FREQ   (CONFIG_SYS_CLK_FREQ * 192 / 2)
-#define CONFIG_S3D2_CLK_FREQ   (266666666u/2)
-#define CONFIG_S3D4_CLK_FREQ   (266666666u/4)
+#define CONFIG_SYS_CLK_FREQ    33333333u
 
 /* Generic Timer Definitions (use in assembler source) */
 #define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
@@ -52,9 +44,6 @@
 
 #define CONFIG_SYS_I2C_POWERIC_ADDR    0x30
 
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ            200000000
-
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 #define CONFIG_SYS_MMC_ENV_DEV         1

diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h
index d6092d5096e6cc7dce38cf020f940504641d3823..c613c733f50d5d19045bb7e0dcc04edeadeb5b2d 100644 (file)
--- a/include/configs/ulcb.h
+++ b/include/configs/ulcb.h
@@ -17,7 +17,6 @@
 /* SCIF */
 #define CONFIG_CONS_SCIF2
 #define CONFIG_CONS_INDEX      2
-#define CONFIG_SH_SCIF_CLK_FREQ        CONFIG_S3D4_CLK_FREQ
 
 /* [A] Hyper Flash */
 /* use to RPC(SPI Multi I/O Bus Controller) */
@@ -28,14 +27,7 @@
 
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
-#define RCAR_XTAL_CLK          33333333u
-#define CONFIG_SYS_CLK_FREQ    RCAR_XTAL_CLK
-/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
-/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz          */
-#define CONFIG_CP_CLK_FREQ     (CONFIG_SYS_CLK_FREQ / 2)
-#define CONFIG_PLL1_CLK_FREQ   (CONFIG_SYS_CLK_FREQ * 192 / 2)
-#define CONFIG_S3D2_CLK_FREQ   (266666666u/2)
-#define CONFIG_S3D4_CLK_FREQ   (266666666u/4)
+#define CONFIG_SYS_CLK_FREQ    33333333u
 
 /* Generic Timer Definitions (use in assembler source) */
 #define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
@@ -65,9 +57,6 @@ unsigned char ulcb_softspi_read(void);
 
 #define CONFIG_SYS_I2C_POWERIC_ADDR    0x30
 
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ            200000000
-
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 #define CONFIG_SYS_MMC_ENV_DEV         1

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 4ce87484c34a360b682963b70ae14ae8225b073c..c2fe81e5520fd846e6034f12ae05139d7cf8b64d 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -346,7 +346,6 @@ CONFIG_CPU_SH7785
 CONFIG_CPU_SH_TYPE_R
 CONFIG_CPU_TYPE_R
 CONFIG_CPU_VR41XX
-CONFIG_CP_CLK_FREQ
 CONFIG_CQSPI_DECODER
 CONFIG_CQSPI_REF_CLK
 CONFIG_CRC32
@@ -1886,8 +1885,6 @@ CONFIG_RUN_FROM_DDR1
 CONFIG_RUN_FROM_IRAM_ONLY
 CONFIG_RX_DESCR_NUM
 CONFIG_S32V234
-CONFIG_S3D2_CLK_FREQ
-CONFIG_S3D4_CLK_FREQ
 CONFIG_S5P
 CONFIG_S5PC100
 CONFIG_S5PC110