regulator-max-microvolt = <3300000>;
};
- ldo1 {
+ ldo_1: ldo1 {
regulator-name = "VDD_EMMC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
eth0 = "/eth@10002000";
eth3 = ð_3;
eth5 = ð_5;
+ gpio1 = &gpio_a;
+ gpio2 = &gpio_b;
i2c0 = "/i2c@0";
mmc0 = "/mmc0";
mmc1 = "/mmc1";
reg = <2 1>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ enable-gpios = <&gpio_a 1>;
+ power-supply = <&ldo_1>;
+ pwms = <&pwm 0 1000>;
+ default-brightness-level = <5>;
+ brightness-levels = <0 16 32 64 128 170 202 234 255>;
+ };
+
bind-test {
bind-test-child1 {
compatible = "sandbox,phy";
power-domains = <&pwrdom 2>;
};
- pwm {
+ pwm: pwm {
compatible = "sandbox,pwm";
+ #pwm-cells = <2>;
};
pwm2 {
compatible = "sandbox,pwm";
+ #pwm-cells = <2>;
};
ram {
remoteproc-name = "remoteproc-test-dev2";
};
+ panel {
+ compatible = "simple-panel";
+ backlight = <&backlight 0 100>;
+ };
+
smem@0 {
compatible = "sandbox,smem";
};
* @buflen: length of buffer in bytes
*/
int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen);
+
+/**
+ * sandbox_pwm_get_config() - get the PWM config for a channel
+ *
+ * @dev: Device to check
+ * @channel: Channel number to check
+ * @period_ns: Period of the PWM in nanoseconds
+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
+ * @enable: true if the PWM is enabled
+ * @polarity: true if the PWM polarity is active high
+ * @return 0 if OK, -ENOSPC if the PWM number is invalid
+ */
+int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
+ uint *duty_nsp, bool *enablep, bool *polarityp);
+
#endif
NUM_CHANNELS = 3,
};
+/**
+ * struct sandbox_pwm_chan - a sandbox PWM channel
+ *
+ * @period_ns: Period of the PWM in nanoseconds
+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
+ * @enable: true if the PWM is enabled
+ * @polarity: true if the PWM polarity is active high
+ */
struct sandbox_pwm_chan {
uint period_ns;
uint duty_ns;
struct sandbox_pwm_chan chan[NUM_CHANNELS];
};
+int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
+ uint *duty_nsp, bool *enablep, bool *polarityp)
+{
+ struct sandbox_pwm_priv *priv = dev_get_priv(dev);
+ struct sandbox_pwm_chan *chan;
+
+ if (channel >= NUM_CHANNELS)
+ return -ENOSPC;
+ chan = &priv->chan[channel];
+ *period_nsp = chan->period_ns;
+ *duty_nsp = chan->duty_ns;
+ *enablep = chan->enable;
+ *polarityp = chan->polarity;
+
+ return 0;
+}
+
static int sandbox_pwm_set_config(struct udevice *dev, uint channel,
uint period_ns, uint duty_ns)
{
obj-$(CONFIG_DM_MMC) += mmc.o
obj-y += ofnode.o
obj-$(CONFIG_OSD) += osd.o
+obj-$(CONFIG_DM_VIDEO) += panel.o
obj-$(CONFIG_DM_PCI) += pci.o
obj-$(CONFIG_PHY) += phy.o
obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for panel uclass
+ *
+ * Copyright (c) 2018 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <common.h>
+#include <backlight.h>
+#include <dm.h>
+#include <panel.h>
+#include <video.h>
+#include <asm/gpio.h>
+#include <asm/test.h>
+#include <dm/test.h>
+#include <test/ut.h>
+#include <power/regulator.h>
+
+/* Basic test of the panel uclass */
+static int dm_test_panel(struct unit_test_state *uts)
+{
+ struct udevice *dev, *pwm, *gpio, *reg;
+ uint period_ns;
+ uint duty_ns;
+ bool enable;
+ bool polarity;
+
+ ut_assertok(uclass_first_device_err(UCLASS_PANEL, &dev));
+ ut_assertok(uclass_first_device_err(UCLASS_PWM, &pwm));
+ ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio));
+ ut_assertok(regulator_get_by_platname("VDD_EMMC_1.8V", ®));
+ ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns,
+ &enable, &polarity));
+ ut_asserteq(false, enable);
+ ut_asserteq(false, regulator_get_enable(reg));
+
+ ut_assertok(panel_enable_backlight(dev));
+ ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns,
+ &enable, &polarity));
+ ut_asserteq(1000, period_ns);
+ ut_asserteq(170 * 1000 / 256, duty_ns);
+ ut_asserteq(true, enable);
+ ut_asserteq(false, polarity);
+ ut_asserteq(1, sandbox_gpio_get_value(gpio, 1));
+ ut_asserteq(true, regulator_get_enable(reg));
+
+ return 0;
+}
+DM_TEST(dm_test_panel, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);