]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: uniphier: add reset-names to NAND controller node
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 28 Feb 2020 12:57:20 +0000 (21:57 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sat, 29 Feb 2020 05:11:36 +0000 (14:11 +0900)
Import Linux commits:

37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node")
e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node")

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/dts/uniphier-ld11.dtsi
arch/arm/dts/uniphier-ld20.dtsi
arch/arm/dts/uniphier-ld4.dtsi
arch/arm/dts/uniphier-pro4.dtsi
arch/arm/dts/uniphier-pro5.dtsi
arch/arm/dts/uniphier-pxs2.dtsi
arch/arm/dts/uniphier-pxs3.dtsi
arch/arm/dts/uniphier-sld8.dtsi

index b3d44e8689566022884b3067df99098fce22ac77..e0737ac7f06c13596b7f92db811c4c9f3a50f5ed 100644 (file)
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };
index 5a7bd3301dd7fb31f7c73f1a881e3c8e9351d561..59e4191dfc39b5d2d9b40d7d3831658b14bbd43f 100644 (file)
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };
index e40407a0dfa5b32605839d91ec283447e0516f8c..1eebc7fa3bee50971ea303bdbedca951d9afa8e3 100644 (file)
                        pinctrl-0 = <&pinctrl_nand2cs>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };
index 7e81260d33d32eac1a5b960954a5db866aa95650..d006b45f7a3da250342359202e1123c730288568 100644 (file)
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };
index 05828d785cec7ec800127bff6bd7e76dafbba699..ba7e224b38e6c2549698ab77989a6741e443c6cd 100644 (file)
                        pinctrl-0 = <&pinctrl_nand2cs>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
 
                emmc: mmc@68400000 {
index bf852c28005ad088c68c9000e76de08779fdf854..8d968d3681023fdd013b4f28b93e18066fcb614b 100644 (file)
                        pinctrl-0 = <&pinctrl_nand2cs>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };
index f830cef8941eea9218e572fa4eb0b517cbc12250..ed079c171137bd3903fed074afa22dafbb20b1ce 100644 (file)
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };
index 332a4da9d6598fa597d08296af8f28b85780df1c..393157eb14ed19e252112fa75e83350ffcc32856 100644 (file)
                        pinctrl-0 = <&pinctrl_nand2cs>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };