Add pixis_set_sgmii command

The 8544DS and 8572DS platforms support an optional SGMII riser card to
expose ethernet over an SGMII interface.  Once the card is in, it is also
necessary to configure the board such that it uses the card, rather than
the on-board ethernet ports.  This can either be done by flipping dip switches
on the motherboard, or by modifying registers in the pixis.  Either way
requires a reboot.

This adds a command to allow users to choose which ports are routed through
the SGMII card, and which through the onboard ports.  It also allows users
to revert to the current switch settings.

This code does not work on the 8572, as the PIXIS is different.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index 64e2e08c54915364443de7243d1897932014b19a..b5a0e847ad7a3a17ad01d486036cc307a4ee9439 100644 (file)
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -26,6 +26,7 @@
 #include <command.h>
 #include <watchdog.h>
 #include <asm/cache.h>
+#include <asm/io.h>
 
 #include "pixis.h"
 
@@ -282,6 +283,60 @@ U_BOOT_CMD(
           "diswd       - Disable watchdog timer \n",
           NULL);
 
+#ifdef CONFIG_FSL_SGMII_RISER
+int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+       int which_tsec = -1;
+       uchar mask;
+       uchar switch_mask;
+
+       if (argc > 2)
+               if (strcmp(argv[1], "all") != 0)
+                       which_tsec = simple_strtoul(argv[1], NULL, 0);
+
+       switch (which_tsec) {
+       case 1:
+               mask = PIXIS_VSPEED2_TSEC1SER;
+               switch_mask = PIXIS_VCFGEN1_TSEC1SER;
+               break;
+       case 3:
+               mask = PIXIS_VSPEED2_TSEC3SER;
+               switch_mask = PIXIS_VCFGEN1_TSEC3SER;
+               break;
+       default:
+               mask = PIXIS_VSPEED2_TSEC1SER | PIXIS_VSPEED2_TSEC3SER;
+               switch_mask = PIXIS_VCFGEN1_TSEC1SER | PIXIS_VCFGEN1_TSEC3SER;
+               break;
+       }
+
+       /* Toggle whether the switches or FPGA control the settings */
+       if (!strcmp(argv[argc - 1], "switch"))
+               clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
+                       switch_mask);
+       else
+               setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
+                       switch_mask);
+
+       /* If it's not the switches, enable or disable SGMII, as specified */
+       if (!strcmp(argv[argc - 1], "on"))
+               clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
+       else if (!strcmp(argv[argc - 1], "off"))
+               setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
+
+       return 0;
+}
+
+U_BOOT_CMD(
+               pixis_set_sgmii, CFG_MAXARGS, 1, pixis_set_sgmii,
+               "pixis_set_sgmii"
+               " - Enable or disable SGMII mode for a given TSEC \n",
+               "\npixis_set_sgmii [TSEC num] <on|off|switch>\n"
+               "    TSEC num: 1,2,3,4 or 'all'.  'all' is default.\n"
+               "    on - enables SGMII\n"
+               "    off - disables SGMII\n"
+               "    switch - use switch settings\n");
+#endif
+
 /*
  * This function takes the non-integral cpu:mpx pll ratio
  * and converts it to an integer that can be used to assign

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index a428e88ef3148aa700a5619b8791fff7b50013b1..612e8f2a741f9cd967ee2b29f8bd9fdc1e25bead 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -196,7 +196,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define PIXIS_VSPEED1          0x18    /* VELA VSpeed 1 */
 #define PIXIS_VCLKH            0x19    /* VELA VCLKH register */
 #define PIXIS_VCLKL            0x1A    /* VELA VCLKL register */
+#define PIXIS_VSPEED2          0x1d    /* VELA VSpeed 2 */
 #define CFG_PIXIS_VBOOT_MASK   0x40    /* Reset altbank mask*/
+#define PIXIS_VSPEED2_TSEC1SER 0x2
+#define PIXIS_VSPEED2_TSEC3SER 0x1
+#define PIXIS_VCFGEN1_TSEC1SER 0x20
+#define PIXIS_VCFGEN1_TSEC3SER 0x40
 
 
 /* define to use L1 as initial stack */