x86: Use a common bus clock for Intel CPUs

Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in
a common file and tidy up the copies.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 61003a6d68f1e5376d65cb745076958f2739b174..586a2e8f05a1ff9e98559acadc59b6ee39def541 100644 (file)
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -60,7 +60,7 @@ void set_max_freq(void)
        msr_write(MSR_IA32_PERF_CTL, perf_ctl);
 
        debug("CPU: frequency set to %d MHz\n",
-             ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
+             ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
 }
 
 int arch_cpu_init(void)

diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c
index d1f3c07109ffff3c59302a399d95ae87459f3225..58cc2f362ccbc7dcc665f7842eb47fc439742695 100644 (file)
--- a/arch/x86/cpu/broadwell/cpu_full.c
+++ b/arch/x86/cpu/broadwell/cpu_full.c
@@ -360,7 +360,7 @@ static void set_max_ratio(void)
        msr_write(MSR_IA32_PERF_CTL, perf_ctl);
 
        debug("cpu: frequency set to %d\n",
-             ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
+             ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
 }
 
 int broadwell_init(struct udevice *dev)
@@ -634,7 +634,7 @@ void cpu_set_power_limits(int power_limit_1_time)
 
 static int broadwell_get_info(struct udevice *dev, struct cpu_info *info)
 {
-       return cpu_intel_get_info(info, BROADWELL_BCLK);
+       return cpu_intel_get_info(info, INTEL_BCLK_MHZ);
 }
 
 static int broadwell_get_count(struct udevice *dev)

diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index ed66d2dd8d72b74b11feb99ad8c0a2dc808f7895..3177ba3297fb419ea2f1286f12160861d80086e4 100644 (file)
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -346,7 +346,7 @@ static void set_max_ratio(void)
        msr_write(MSR_IA32_PERF_CTL, perf_ctl);
 
        debug("model_x06ax: frequency set to %d\n",
-             ((perf_ctl.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK);
+             ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
 }
 
 static void set_energy_perf_bias(u8 policy)
@@ -418,7 +418,7 @@ static int model_206ax_init(struct udevice *dev)
 
 static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info)
 {
-       return cpu_intel_get_info(info, SANDYBRIDGE_BCLK);
+       return cpu_intel_get_info(info, INTEL_BCLK_MHZ);
 
        return 0;
 }

diff --git a/arch/x86/include/asm/arch-broadwell/cpu.h b/arch/x86/include/asm/arch-broadwell/cpu.h
index ca22a7999680519699df350c03f734e60b8362b9..3bc3bd6609e2a49301f5fd03a2e35aa81f9511fa 100644 (file)
--- a/arch/x86/include/asm/arch-broadwell/cpu.h
+++ b/arch/x86/include/asm/arch-broadwell/cpu.h
@@ -21,9 +21,6 @@
 #define CPUID_BROADWELL_D0     0x306d3
 #define CPUID_BROADWELL_E0     0x306d4
 
-/* Broadwell bus clock is fixed at 100MHz */
-#define BROADWELL_BCLK         100
-
 #define BROADWELL_FAMILY_ULT   0x306d0
 
 #define CORE_THREAD_COUNT_MSR          0x35

diff --git a/arch/x86/include/asm/arch-broadwell/pch.h b/arch/x86/include/asm/arch-broadwell/pch.h
index 23153a040fa960e74a8c2f2ab6ae23c87b6e5416..ecdf6d16f94279c6896370fd1be232510a728b94 100644 (file)
--- a/arch/x86/include/asm/arch-broadwell/pch.h
+++ b/arch/x86/include/asm/arch-broadwell/pch.h
@@ -6,9 +6,6 @@
 #ifndef __ASM_ARCH_PCH_H
 #define __ASM_ARCH_PCH_H
 
-/* CPU bus clock is fixed at 100MHz */
-#define CPU_BCLK               100
-
 #define PMBASE                 0x40
 #define ACPI_CNTL              0x44
 #define  ACPI_EN               (1 << 7)

diff --git a/arch/x86/include/asm/arch-ivybridge/model_206ax.h b/arch/x86/include/asm/arch-ivybridge/model_206ax.h
index 850d96bdd9aa1b5a0f572a81dc7d86f8044bfdfb..10caaa242263af2f899c4d21058b1f547e4e2b33 100644 (file)
--- a/arch/x86/include/asm/arch-ivybridge/model_206ax.h
+++ b/arch/x86/include/asm/arch-ivybridge/model_206ax.h
@@ -8,9 +8,6 @@
 #ifndef _ASM_ARCH_MODEL_206AX_H
 #define _ASM_ARCH_MODEL_206AX_H
 
-/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */
-#define SANDYBRIDGE_BCLK               100
-
 #define  CPUID_VMX                     (1 << 5)
 #define  CPUID_SMX                     (1 << 6)
 #define MSR_FEATURE_CONFIG             0x13c

diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h
index e158c96ce6a624d4324081ed03662e93c42e4955..f42eb323089994156494f0a99b25bf5ae2e1e33f 100644 (file)
--- a/arch/x86/include/asm/cpu_common.h
+++ b/arch/x86/include/asm/cpu_common.h
@@ -6,6 +6,11 @@
 #ifndef __ASM_CPU_COMMON_H
 #define __ASM_CPU_COMMON_H
 
+/* Standard Intel bus clock is fixed at 100MHz */
+enum {
+       INTEL_BCLK_MHZ          = 100
+};
+
 struct cpu_info;
 
 /**