F: drivers/gpio/msm_gpio.c
F: drivers/mmc/msm_sdhci.c
F: drivers/phy/msm8916-usbh-phy.c
+F: drivers/pinctrl/qcom/
F: drivers/serial/serial_msm.c
F: drivers/serial/serial_msm_geni.c
F: drivers/smem/msm_smem.c
bool "Qualcomm Snapdragon 845 SoC"
select LINUX_KERNEL_IMAGE_HEADER
imply CLK_QCOM_SDM845
+ imply PINCTRL_QCOM_SDM845
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
default 0x80000000
select BOARD_LATE_INIT
select ENABLE_ARM_SOC_BOOT0_HOOK
imply CLK_QCOM_APQ8016
+ imply PINCTRL_QCOM_APQ8016
help
Support for 96Boards Dragonboard 410C. This board complies with
96Board Open Platform Specifications. Features:
config TARGET_DRAGONBOARD820C
bool "96Boards Dragonboard 820C"
imply CLK_QCOM_APQ8096
+ imply PINCTRL_QCOM_APQ8096
help
Support for 96Boards Dragonboard 820C. This board complies with
96Board Open Platform Specifications. Features:
bool "Qualcomm Technologies, Inc. QCS404 EVB"
select LINUX_KERNEL_IMAGE_HEADER
imply CLK_QCOM_QCS404
+ imply PINCTRL_QCOM_QCS404
help
Support for Qualcomm Technologies, Inc. QCS404 evaluation board.
Features:
obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
obj-y += misc.o
obj-y += dram.o
-obj-y += pinctrl-snapdragon.o
-obj-y += pinctrl-apq8016.o
-obj-y += pinctrl-apq8096.o
-obj-y += pinctrl-qcs404.o
-obj-y += pinctrl-sdm845.o
obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o
source "drivers/pinctrl/nexell/Kconfig"
source "drivers/pinctrl/nuvoton/Kconfig"
source "drivers/pinctrl/nxp/Kconfig"
+source "drivers/pinctrl/qcom/Kconfig"
source "drivers/pinctrl/renesas/Kconfig"
source "drivers/pinctrl/rockchip/Kconfig"
source "drivers/pinctrl/sunxi/Kconfig"
obj-$(CONFIG_PINCTRL_INTEL) += intel/
obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
obj-$(CONFIG_ARCH_NPCM) += nuvoton/
+obj-$(CONFIG_PINCTRL_QCOM) += qcom/
obj-$(CONFIG_ARCH_RMOBILE) += renesas/
obj-$(CONFIG_ARCH_RZN1) += renesas/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
--- /dev/null
+if ARCH_SNAPDRAGON
+
+config PINCTRL_QCOM
+ depends on PINCTRL_GENERIC
+ def_bool n
+
+menu "Qualcomm pinctrl drivers"
+
+config PINCTRL_QCOM_APQ8016
+ bool "Qualcomm APQ8016 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the MSM8916 / APQ8016
+ Snapdragon 410 SoC, as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_APQ8096
+ bool "Qualcomm APQ8096 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the MSM8996 / APQ8096
+ Snapdragon 820 SoC, as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_QCS404
+ bool "Qualcomm QCS404 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon QCS404 SoC,
+ as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_SDM845
+ bool "Qualcomm SDM845 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon 845 SoC,
+ as well as the associated GPIO driver.
+
+endmenu
+
+endif
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2023 Linaro Ltd.
+
+obj-$(CONFIG_PINCTRL_QCOM) += pinctrl-qcom.o
+obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o
+obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o
+obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o
+obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
*
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data apq8016_data = {
+static const struct msm_pinctrl_data apq8016_data = {
.pin_count = 133,
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = apq8016_get_function_name,
.get_function_mux = apq8016_get_function_mux,
.get_pin_name = apq8016_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_apq8016) = {
+ .name = "pinctrl_apq8016",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
*
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data apq8096_data = {
+static const struct msm_pinctrl_data apq8096_data = {
.pin_count = 157,
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = apq8096_get_function_name,
.get_function_mux = apq8096_get_function_mux,
.get_pin_name = apq8096_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,msm8996-pinctrl", .data = (ulong)&apq8096_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_apq8096) = {
+ .name = "pinctrl_apq8096",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
#include <errno.h>
#include <asm/io.h>
#include <dm/device_compat.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dm/pinctrl.h>
#include <linux/bitops.h>
-#include "pinctrl-snapdragon.h"
+#include "pinctrl-qcom.h"
struct msm_pinctrl_priv {
phys_addr_t base;
return 0;
}
-static struct pinctrl_ops msm_pinctrl_ops = {
+struct pinctrl_ops msm_pinctrl_ops = {
.get_pins_count = msm_get_pins_count,
.get_pin_name = msm_get_pin_name,
.set_state = pinctrl_generic_set_state,
.get_function_name = msm_get_function_name,
};
-static int msm_pinctrl_bind(struct udevice *dev)
+int msm_pinctrl_bind(struct udevice *dev)
{
ofnode node = dev_ofnode(dev);
+ struct msm_pinctrl_data *data = (struct msm_pinctrl_data *)dev_get_driver_data(dev);
+ struct driver *drv;
+ struct udevice *pinctrl_dev;
const char *name;
int ret;
+ drv = lists_driver_lookup_name("pinctrl_qcom");
+ if (!drv)
+ return -ENOENT;
+
+ ret = device_bind_with_driver_data(dev_get_parent(dev), drv, ofnode_get_name(node), (ulong)data,
+ dev_ofnode(dev), &pinctrl_dev);
+ if (ret)
+ return ret;
+
ofnode_get_property(node, "gpio-controller", &ret);
if (ret < 0)
return 0;
/* Bind gpio node */
ret = device_bind_driver_to_node(dev, "gpio_msm",
name, node, NULL);
- if (ret)
+ if (ret) {
+ device_unbind(pinctrl_dev);
return ret;
-
- dev_dbg(dev, "bind %s\n", name);
+ }
return 0;
}
-static const struct udevice_id msm_pinctrl_ids[] = {
- { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data },
- { .compatible = "qcom,msm8996-pinctrl", .data = (ulong)&apq8096_data },
- { .compatible = "qcom,sdm845-pinctrl", .data = (ulong)&sdm845_data },
- { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data },
- { }
-};
-
-U_BOOT_DRIVER(pinctrl_snapdraon) = {
- .name = "pinctrl_msm",
+U_BOOT_DRIVER(pinctrl_qcom) = {
+ .name = "pinctrl_qcom",
.id = UCLASS_PINCTRL,
- .of_match = msm_pinctrl_ids,
.priv_auto = sizeof(struct msm_pinctrl_priv),
.ops = &msm_pinctrl_ops,
.probe = msm_pinctrl_probe,
- .bind = msm_pinctrl_bind,
};
* (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
*
*/
-#ifndef _PINCTRL_SNAPDRAGON_H
-#define _PINCTRL_SNAPDRAGON_H
+#ifndef _PINCTRL_QCOM_H
+#define _PINCTRL_QCOM_H
struct udevice;
int val;
};
-extern struct msm_pinctrl_data apq8016_data;
-extern struct msm_pinctrl_data apq8096_data;
-extern struct msm_pinctrl_data sdm845_data;
-extern struct msm_pinctrl_data qcs404_data;
+extern struct pinctrl_ops msm_pinctrl_ops;
+
+int msm_pinctrl_bind(struct udevice *dev);
#endif
* (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data qcs404_data = {
+static struct msm_pinctrl_data qcs404_data = {
.pin_count = 126,
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = qcs404_get_function_name,
.get_function_mux = qcs404_get_function_mux,
.get_pin_name = qcs404_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_qcs404) = {
+ .name = "pinctrl_qcs404",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
*
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data sdm845_data = {
+static struct msm_pinctrl_data sdm845_data = {
.pin_count = 150,
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = sdm845_get_function_name,
.get_function_mux = sdm845_get_function_mux,
.get_pin_name = sdm845_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,sdm845-pinctrl", .data = (ulong)&sdm845_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_sdm845) = {
+ .name = "pinctrl_sdm845",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
projects / u-boot.git / commitdiff