arm: bcmbca: add bcm6878 SoC support

BCM6878 is an ARM A7 based PON Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011
uart.

This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.

The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.

Signed-off-by: William Zhang <william.zhang@broadcom.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index c3a8a9d5d4f011ac73e7052fe9dd31429d811de1..74a240bbdad013646ea9c750fc1df2e6d307214a 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -220,6 +220,7 @@ N:  bcmbca
 N:     bcm[9]?47622
 N:     bcm[9]?63178
 N:     bcm[9]?6846
+N:     bcm[9]?6878
 
 ARM BROADCOM BCMSTB
 M:     Thomas Fitzsimmons <fitzsim@fitzsim.org>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 4ddff6ee5a413b7bb8ccbff10e56035eb5c65d20..d0996a11fc5581d9aa31eaa571d69d6930e540bc 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1186,6 +1186,8 @@ dtb-$(CONFIG_BCM63178) += \
        bcm963178.dtb
 dtb-$(CONFIG_BCM6846) += \
        bcm96846.dtb
+dtb-$(CONFIG_BCM6878) += \
+       bcm96878.dtb
 
 dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb
 dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb

diff --git a/arch/arm/dts/bcm6878.dtsi b/arch/arm/dts/bcm6878.dtsi
new file mode 100644 (file)
index 0000000..1e8b5fa
--- /dev/null
+++ b/arch/arm/dts/bcm6878.dtsi
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+       compatible = "brcm,bcm6878", "brcm,bcmbca";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       interrupt-parent = <&gic>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               CA7_0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x0>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               CA7_1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x1>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               L2_0: l2-cache0 {
+                       compatible = "cache";
+               };
+       };
+
+       timer {
+               compatible = "arm,armv7-timer";
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+               arm,cpu-registers-not-fw-configured;
+       };
+
+       pmu: pmu {
+               compatible = "arm,cortex-a7-pmu";
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&CA7_0>, <&CA7_1>;
+       };
+
+       clocks: clocks {
+               periph_clk: periph-clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+               };
+               uart_clk: uart-clk {
+                       compatible = "fixed-factor-clock";
+                       #clock-cells = <0>;
+                       clocks = <&periph_clk>;
+                       clock-div = <4>;
+                       clock-mult = <1>;
+               };
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       axi@81000000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x81000000 0x8000>;
+
+               gic: interrupt-controller@1000 {
+                       compatible = "arm,cortex-a7-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x1000 0x1000>,
+                               <0x2000 0x2000>,
+                               <0x4000 0x2000>,
+                               <0x6000 0x2000>;
+                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+                                       IRQ_TYPE_LEVEL_HIGH)>;
+               };
+       };
+
+       bus@ff800000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0xff800000 0x800000>;
+
+               uart0: serial@12000 {
+                       compatible = "arm,pl011", "arm,primecell";
+                       reg = <0x12000 0x1000>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&uart_clk>, <&uart_clk>;
+                       clock-names = "uartclk", "apb_pclk";
+                       status = "disabled";
+               };
+       };
+};

diff --git a/arch/arm/dts/bcm96878.dts b/arch/arm/dts/bcm96878.dts
new file mode 100644 (file)
index 0000000..8fbc175
--- /dev/null
+++ b/arch/arm/dts/bcm96878.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6878.dtsi"
+
+/ {
+       model = "Broadcom BCM96878 Reference Board";
+       compatible = "brcm,bcm96878", "brcm,bcm6878", "brcm,bcmbca";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x08000000>;
+       };
+};
+
+&uart0 {
+       status = "okay";
+};

diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index 891ac30dbdcee5f4a551ed7b324a7f0825c02bdf..5b67975c454200ffad16a8bdb4eb31c6c74258fd 100644 (file)
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -26,8 +26,16 @@ config BCM6846
        select DM_SERIAL
        select BCM6345_SERIAL
 
+config BCM6878
+       bool "Support for Broadcom 6878 Family"
+       select SYS_ARCH_TIMER
+       select CPU_V7A
+       select DM_SERIAL
+       select PL01X_SERIAL
+
 source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
 source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
 source "arch/arm/mach-bcmbca/bcm6846/Kconfig"
+source "arch/arm/mach-bcmbca/bcm6878/Kconfig"
 
 endif

diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index 308730407212b8f59f198c3e855b4346a31489f5..87710c66f9b7b8de7cc49ec0ebaada9376fd8bba 100644 (file)
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -6,3 +6,4 @@
 obj-$(CONFIG_BCM47622) += bcm47622/
 obj-$(CONFIG_BCM63178) += bcm63178/
 obj-$(CONFIG_BCM6846) += bcm6846/
+obj-$(CONFIG_BCM6878) += bcm6878/

diff --git a/arch/arm/mach-bcmbca/bcm6878/Kconfig b/arch/arm/mach-bcmbca/bcm6878/Kconfig
new file mode 100644 (file)
index 0000000..43f8942
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6878/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM6878
+
+config TARGET_BCM96878
+       bool "Broadcom 6878 Reference Board"
+       depends on ARCH_BCMBCA
+
+config SYS_SOC
+       default "bcm6878"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif

diff --git a/arch/arm/mach-bcmbca/bcm6878/Makefile b/arch/arm/mach-bcmbca/bcm6878/Makefile
new file mode 100644 (file)
index 0000000..beb979a
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6878/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj- += dummy.o

diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 70ca38099fcfb28b6a070b232641388faf81386b..2d95deec66667e2f74db4e5f346fc4289c795bbc 100644 (file)
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -16,6 +16,13 @@ config SYS_CONFIG_NAME
 
 endif
 
+if TARGET_BCM96878
+
+config SYS_CONFIG_NAME
+       default "bcm96878"
+
+endif
+
 if TARGET_BCM963178
 
 config SYS_CONFIG_NAME

diff --git a/configs/bcm96878_defconfig b/configs/bcm96878_defconfig
new file mode 100644 (file)
index 0000000..8476462
--- /dev/null
+++ b/configs/bcm96878_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM6878=y
+CONFIG_TARGET_BCM96878=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="bcm96878"
+CONFIG_IDENT_STRING=" Broadcom BCM6878"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y

diff --git a/include/configs/bcm96878.h b/include/configs/bcm96878.h
new file mode 100644 (file)
index 0000000..3e23e94
--- /dev/null
+++ b/include/configs/bcm96878.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM96878_H
+#define __BCM96878_H
+
+#define CONFIG_SYS_SDRAM_BASE          0x00000000
+
+#endif