ARM: imx6: DHCOM i.MX6 PDK: Switch to DM for I2C

This patch enables DM I2C for DHCOM i.MX6 PDK2 boards and
removes non DM I2C code. The I2C EEPROM with ethaddr (MAC)
is defined in the device tree. Use UCLASS_I2C_EEPROM
to find the device by fixed hardware path and read the ethaddr.

Tested with DHCOM i.MX6dl and DHCOM i.MX6q.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>

diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c
index 7b1a27ac370b2a1185ab300a43773d5ed653069e..40cc2a854eeea55fc51bbd1ef6c821ba90c6f906 100644 (file)
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -18,7 +18,6 @@
 #include <asm/io.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/mxc_i2c.h>
 #include <asm/mach-imx/sata.h>
 #include <ahci.h>
 #include <dwc_ahsata.h>
@@ -26,7 +25,7 @@
 #include <errno.h>
 #include <fsl_esdhc_imx.h>
 #include <fuse.h>
-#include <i2c.h>
+#include <i2c_eeprom.h>
 #include <miiphy.h>
 #include <mmc.h>
 #include <net.h>
@@ -36,92 +35,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define I2C_PAD_CTRL                                                   \
-       (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |  \
-       PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define EEPROM_I2C_ADDRESS     0x50
-
-#define PC                     MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-static struct i2c_pads_info dh6sdl_i2c_pad_info0 = {
-       .scl = {
-               .i2c_mode  = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
-               .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
-               .gp = IMX_GPIO_NR(3, 21)
-       },
-       .sda = {
-                .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
-                .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
-                .gp = IMX_GPIO_NR(3, 28)
-        }
-};
-
-static struct i2c_pads_info dh6sdl_i2c_pad_info1 = {
-       .scl = {
-               .i2c_mode  = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
-               .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
-               .gp = IMX_GPIO_NR(4, 12)
-       },
-       .sda = {
-                .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
-                .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-                .gp = IMX_GPIO_NR(4, 13)
-        }
-};
-
-static struct i2c_pads_info dh6sdl_i2c_pad_info2 = {
-       .scl = {
-               .i2c_mode  = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
-               .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC,
-               .gp = IMX_GPIO_NR(1, 3)
-       },
-       .sda = {
-                .i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC,
-                .gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC,
-                .gp = IMX_GPIO_NR(1, 6)
-        }
-};
-
-static struct i2c_pads_info dh6dq_i2c_pad_info0 = {
-       .scl = {
-               .i2c_mode  = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
-               .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
-               .gp = IMX_GPIO_NR(3, 21)
-       },
-       .sda = {
-                .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
-                .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
-                .gp = IMX_GPIO_NR(3, 28)
-        }
-};
-
-static struct i2c_pads_info dh6dq_i2c_pad_info1 = {
-       .scl = {
-               .i2c_mode  = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
-               .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
-               .gp = IMX_GPIO_NR(4, 12)
-       },
-       .sda = {
-                .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
-                .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-                .gp = IMX_GPIO_NR(4, 13)
-        }
-};
-
-static struct i2c_pads_info dh6dq_i2c_pad_info2 = {
-       .scl = {
-               .i2c_mode  = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
-               .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
-               .gp = IMX_GPIO_NR(1, 3)
-       },
-       .sda = {
-                .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
-                .gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC,
-                .gp = IMX_GPIO_NR(1, 6)
-        }
-};
-
 int dram_init(void)
 {
        gd->ram_size = imx_ddr_size();
@@ -214,6 +127,8 @@ int board_usb_phy_mode(int port)
 
 static int setup_dhcom_mac_from_fuse(void)
 {
+       struct udevice *dev;
+       ofnode eeprom;
        unsigned char enetaddr[6];
        int ret;
 
@@ -228,13 +143,19 @@ static int setup_dhcom_mac_from_fuse(void)
                return 0;
        }
 
-       ret = i2c_set_bus_num(2);
+       eeprom = ofnode_path("/soc/aips-bus@2100000/i2c@21a8000/eeprom@50");
+       if (!ofnode_valid(eeprom)) {
+               printf("Invalid hardware path to EEPROM!\n");
+               return -ENODEV;
+       }
+
+       ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
        if (ret) {
-               printf("Error switching I2C bus!\n");
+               printf("Cannot find EEPROM!\n");
                return ret;
        }
 
-       ret = i2c_read(EEPROM_I2C_ADDRESS, 0xfa, 0x1, enetaddr, 0x6);
+       ret = i2c_eeprom_read(dev, 0xfa, enetaddr, 0x6);
        if (ret) {
                printf("Error reading configuration EEPROM!\n");
                return ret;
@@ -265,18 +186,6 @@ int board_init(void)
        /* Enable eim_slow clocks */
        setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
 
-#ifdef CONFIG_SYS_I2C_MXC
-       if (is_mx6dq()) {
-               setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info0);
-               setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info1);
-               setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info2);
-       } else {
-               setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info0);
-               setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info1);
-               setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info2);
-       }
-#endif
-
        setup_dhcom_mac_from_fuse();
 
        return 0;

diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 387ab843b31dd9ecebf5578c8192f1b081660826..3022a187cc2f5f4c56c75c33646464fb60f7236a 100644 (file)
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -23,7 +23,6 @@ CONFIG_BOOTDELAY=3
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_MEMTEST=y
@@ -48,6 +47,10 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DWC_AHSATA=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_DM_SPI_FLASH=y

diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 3b1d0a99a19016dcb4f8bc5a7dd7048b2ef3d220..7d2e5738467207d8abb2476d3bf66b6ad56f4a69 100644 (file)
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -48,14 +48,6 @@
 #define CONFIG_FEC_MXC_PHYADDR         0
 #define CONFIG_ARP_TIMEOUT             200UL
 
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED           100000
-
 /* MMC Configs */
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0