]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
authorDerald D. Woods <woods.technical@gmail.com>
Sat, 15 Dec 2018 07:36:46 +0000 (01:36 -0600)
committerTom Rini <trini@konsulko.com>
Mon, 21 Jan 2019 13:36:11 +0000 (08:36 -0500)
This commit converts the following items to Kconfig:

CONFIG_ATMEL_NAND_HWECC
CONFIG_ATMEL_NAND_HW_PMECC
CONFIG_PMECC_CAP
CONFIG_PMECC_SECTOR_SIZE
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap

[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html

Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")
[trini: Make the migration be size neutral and possibly not fix the
above in all cases]
Reported-by: Daniel Evans <photonthunder@gmail.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
39 files changed:
configs/at91sam9n12ek_mmc_defconfig
configs/at91sam9n12ek_nandflash_defconfig
configs/at91sam9n12ek_spiflash_defconfig
configs/at91sam9x5ek_dataflash_defconfig
configs/at91sam9x5ek_mmc_defconfig
configs/at91sam9x5ek_nandflash_defconfig
configs/at91sam9x5ek_spiflash_defconfig
configs/gurnard_defconfig
configs/sama5d2_ptc_ek_mmc_defconfig
configs/sama5d2_ptc_ek_nandflash_defconfig
configs/sama5d36ek_cmp_mmc_defconfig
configs/sama5d36ek_cmp_nandflash_defconfig
configs/sama5d36ek_cmp_spiflash_defconfig
configs/sama5d3_xplained_mmc_defconfig
configs/sama5d3_xplained_nandflash_defconfig
configs/sama5d3xek_mmc_defconfig
configs/sama5d3xek_nandflash_defconfig
configs/sama5d3xek_spiflash_defconfig
configs/sama5d4_xplained_mmc_defconfig
configs/sama5d4_xplained_nandflash_defconfig
configs/sama5d4_xplained_spiflash_defconfig
configs/sama5d4ek_mmc_defconfig
configs/sama5d4ek_nandflash_defconfig
configs/sama5d4ek_spiflash_defconfig
configs/wb45n_defconfig
configs/wb50n_defconfig
doc/README.atmel_pmecc
drivers/mtd/nand/raw/Kconfig
include/configs/at91sam9n12ek.h
include/configs/at91sam9x5ek.h
include/configs/sama5d2_ptc_ek.h
include/configs/sama5d3_xplained.h
include/configs/sama5d3xek.h
include/configs/sama5d4_xplained.h
include/configs/sama5d4ek.h
include/configs/snapper9g45.h
include/configs/wb45n.h
include/configs/wb50n.h
scripts/config_whitelist.txt

index 6b2cfe9c4226fa37f2c590e3fed53eb91facd330..853a2641fdde8ee3e3f7acd0187ac971d8719228 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 354c24ff16eb5242b40c9a5ef1f79040aca3b7b9..fd83ba06d375bced7bf66aefdaafcc16a5ad11d4 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 63889355bfc8ce43f5dca95fc28c837caf2af4a7..273f91c59eb565950340c81fce3388d077c0cf00 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index dc1350971505278766572e7e9e6a5bbbf2927f7d..010d7314afe67e5d5e2249addc1f1c28ddad8c3d 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index ff86f93e61602de935fdf746c7f0e80b3ac1b577..5deabafe263ff24a5b8684d875b69c44ab7394bf 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index b2b3ddb6d9eebff4bd4a538648db82cbdf5961ce..bdb2b9af6728730e7668b224c4ee2a3a5eaf7426 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index d0eebcdc75b5490b305f48e8e62446077167dad5..5f06231442eb48daf5a974cf89e83f116582441a 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 3c3537a77b5ed68839e787c5d1fe24db87c240a8..d19f485c1ae0336be8d16f28ae3219fd6a22def7 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HWECC=y
 CONFIG_PHYLIB=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
index 4a78b2da3d9b76e1a5ee2c25928c6886b09db116..f9ef8a837d30aa3b5121027a58a71cdcd3e5acc0 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HW_PMECC=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
index dd6068dd468328a3c5d9202715e2b7f19339a823..f87baebed4f93d611542897efb1d94ae3342ab4f 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_NAND_ATMEL=y
+CONFIG_ATMEL_NAND_HW_PMECC=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
index 3026cab380bd7bb34b784634e7f8c3e1eeec1125..ced445f17d3606ce86b5c4369e784e0dde8015e2 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index ca8cce9de087039ca515c7f28d5b518285128b16..2967036c2fc4b133154a45fef03302dd02c697b5 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 04ca6a8e34f9ac80e70453e59628322b1fce3be4..1f1fc8ee339db5d3a64c71779a5dc3ffd39f7fdd 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index eab38ec3665f5291737932c371c844c187f1fc11..778e395c5b1a42c2f02022e353b089bef0e2704c 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
index ff7d2bffdd786685f2b71722266edc5927f21636..a6682462f170e11555d6aac00ac242fa2e321120 100644 (file)
@@ -56,6 +56,8 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
index 6faea0ec3f76ff2fd3311528f58d43cb13e2a5d7..0244360808856e4704fbe9c68e43e03ca40dafb5 100644 (file)
@@ -67,6 +67,8 @@ CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index e641279ee136f3910e3f3ac30da4667e75edcbdf..0e366653465c6863208cc4c120c93cb8dd14a123 100644 (file)
@@ -61,6 +61,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 37f603d528f4d5fecda6396e6e11b2f75417769b..43db3872e9f71bc77e748d54d6758ce3c514fe41 100644 (file)
@@ -62,6 +62,8 @@ CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index bfcea3f5196a4fcdc449b030216746e57353b1b9..32ebb17b4bb70c9061bc5f4d2ad7b13de4a70da7 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 2c1b7f17c057e36abc1b5ee3654cf2e7944a2eab..38a8b1c3b42daeac43d76f54157a4fea48d24060 100644 (file)
@@ -54,6 +54,8 @@ CONFIG_I2C_EEPROM=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index a89dd11a8c15fb7c4539774f0454d0535057e075..ef0833905e248dd3beef77f4a22f50427d24e4f2 100644 (file)
@@ -58,6 +58,8 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 45e65399139dc182fdc87cb8cf305d2e36b0cbab..0b2067ea47f03bf0620388a164994628e6ad5850 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 14971104522bc32d569d42a9ca1bef2fd29b2d5b..b830b8f653c20509487615d3a856dfd15a978eaf 100644 (file)
@@ -54,6 +54,8 @@ CONFIG_AT91_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index dad32b57113d7cfa65073fec2215007c9a890b08..87052d5a019df72303b2932684902cabe06627d8 100644 (file)
@@ -55,6 +55,8 @@ CONFIG_DM_MMC=y
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
index 9d881e5d41ab381f08688711a11f4e4006fb32ca..d57c06ae139be8d927f649fae43e84e8a9eda95b 100644 (file)
@@ -28,5 +28,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=4
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_LZMA=y
 CONFIG_OF_LIBFDT=y
index c74eba10124fc58db5859e590022e45412dfd989..1b62c6899bf1036957e188aec8e0011fa087a0a2 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
+CONFIG_PMECC_CAP=8
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
index 274d860f06b3aea9e5bd644244b6b83d253f647a..c86d085779458f8fb179920496829ab0c22e461f 100644 (file)
@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set:
        2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE.
           It only can be 512 or 1024.
 
-Take AT91SAM9X5EK as an example, the board definition file likes:
+Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board
+configuration file has the following entries:
 
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC                1
-#define CONFIG_ATMEL_NAND_HW_PMECC     1
-#define CONFIG_PMECC_CAP               2
-#define CONFIG_PMECC_SECTOR_SIZE       512
+       CONFIG_PMECC_CAP=2
+       CONFIG_PMECC_SECTOR_SIZE=512
+       CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 
 How to enable PMECC header for direct programmable boot.bin
 -----------------------------------------------------------
@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to
 look like. In order to do so we have a new image type added to mkimage to
 generate this PMECC header and integrated this into the build process of SPL.
 
-To enable the generation of atmel PMECC header for SPL one need to define
+To enable the generation of atmel PMECC header for SPL one needs to define
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from
 board configuration and compiled into the host tools atmel_pmecc_params. This
 tool will be called in build process to parametrize mkimage for atmelimage
index ffc6cc98aa024b613bb73b4fbb7bf493ee5e806c..6d466603d818d43452fc2e9a67ffeda52c8458c4 100644 (file)
@@ -22,6 +22,44 @@ config NAND_ATMEL
          Enable this driver for NAND flash platforms using an Atmel NAND
          controller.
 
+if NAND_ATMEL
+
+config ATMEL_NAND_HWECC
+       bool "Atmel Hardware ECC"
+       default n
+
+config ATMEL_NAND_HW_PMECC
+       bool "Atmel Programmable Multibit ECC (PMECC)"
+       select ATMEL_NAND_HWECC
+       default n
+       help
+         The Programmable Multibit ECC (PMECC) controller is a programmable
+         binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
+
+config PMECC_CAP
+       int "PMECC Correctable ECC Bits"
+       depends on ATMEL_NAND_HW_PMECC
+       default 2
+       help
+         Correctable ECC bits, can be 2, 4, 8, 12, and 24.
+
+config PMECC_SECTOR_SIZE
+       int "PMECC Sector Size"
+       depends on ATMEL_NAND_HW_PMECC
+       default 512
+       help
+         Sector size, in bytes, can be 512 or 1024.
+
+config SPL_GENERATE_ATMEL_PMECC_HEADER
+       bool "Atmel PMECC Header Generation"
+       select ATMEL_NAND_HWECC
+       select ATMEL_NAND_HW_PMECC
+       default n
+       help
+         Generate Programmable Multibit ECC (PMECC) header for SPL image.
+
+endif
+
 config NAND_DAVINCI
        bool "Support TI Davinci NAND controller"
        help
index 6cd267eee67ffa265cf947d92a5c3c37fcbfdc07..777a99b7305c47c214b4632fb6a7dd352ff55706 100644 (file)
 #define CONFIG_SYS_NAND_READY_PIN      GPIO_PIN_PD(5)
 #endif
 
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP               2
-#define CONFIG_PMECC_SECTOR_SIZE       512
-
 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
        "console=console=ttyS0,115200\0"                                \
        "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"                                  \
 #define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
index 63305a7cdd3a0c65bc55373359aa2d0a44155026..6adb965c3cd6eaf9bdc31fd72f2d7324fa20c5b5 100644 (file)
 #define CONFIG_SYS_NAND_READY_PIN      AT91_PIN_PD5
 #endif
 
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC                1
-#define CONFIG_ATMEL_NAND_HW_PMECC     1
-#define CONFIG_PMECC_CAP               2
-#define CONFIG_PMECC_SECTOR_SIZE       512
-
 /* USB */
 #ifdef CONFIG_CMD_USB
 #ifndef CONFIG_USB_EHCI_HCD
 #define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
index 87a0a74b31c22d8b56603a368e531e57ff9adb16..f42e26a0e07c30a2cf49ba0b223be5f8319d1947 100644 (file)
@@ -33,9 +33,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE       BIT(22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
 #endif
 
 #endif /* __CONFIG_H */
index d0d8087ca3812aae85b77aad139a07fe79f7dd39..8a9a19d38e61bcd0929a7a43f00c10695f3a3100 100644 (file)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #endif
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP               4
-#define CONFIG_PMECC_SECTOR_SIZE       512
 
 /* USB */
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL
 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
@@ -88,6 +82,5 @@
 #define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
index 4d3c3b831474173d65d97bdfc878ae05be4e8c70..ca1c2b0861a3823c695672db147726d25229e822 100644 (file)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #endif
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP               4
-#define CONFIG_PMECC_SECTOR_SIZE       512
 
 /* USB */
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
index 7f8ac178f3c0279031a1983f08bd0d0a1e8b9518..bbb16993ec40056c6a446d6006b9ea6cbc4d1c5e 100644 (file)
@@ -37,9 +37,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
 #endif
 
 /* SPL */
@@ -64,8 +61,6 @@
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_BASE
 #endif
-#define CONFIG_PMECC_CAP               8
-#define CONFIG_PMECC_SECTOR_SIZE       512
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE      0x1000
@@ -73,6 +68,5 @@
 #define CONFIG_SYS_NAND_OOBSIZE                224
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x40000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
index aa8573d8ba02455e2626caf08d45aa79c203f0f9..d58041650cfcfd33f9c1fb5c2a4248075db11aca 100644 (file)
@@ -37,9 +37,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
 #endif
 
 /* SPL */
@@ -63,8 +60,6 @@
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_BASE
 #endif
-#define CONFIG_PMECC_CAP               8
-#define CONFIG_PMECC_SECTOR_SIZE       512
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_SIZE      0x1000
@@ -72,6 +67,5 @@
 #define CONFIG_SYS_NAND_OOBSIZE                224
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x40000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
index f2c47dabc5c5d171d370753021dd8c3511f5a173..dac2e652314a6394c019330faf9f644a31d920ab 100644 (file)
@@ -35,7 +35,6 @@
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
 
 /* NAND Flash */
-#define CONFIG_ATMEL_NAND_HWECC
 #define CONFIG_SYS_NAND_ECC_BASE       ATMEL_BASE_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
index b516b66c3565fe1f2810d3ebe61f358c08fb7358..add4019b31154e7c31baac1002218c729b9add96 100644 (file)
 #define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD4
 #define CONFIG_SYS_NAND_READY_PIN   AT91_PIN_PD5
 
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC     1
-#define CONFIG_ATMEL_NAND_HW_PMECC  1
-#define CONFIG_PMECC_CAP            4
-#define CONFIG_PMECC_SECTOR_SIZE    512
-
 #define CONFIG_RBTREE
 #define CONFIG_LZO
 
 #define CONFIG_SYS_NAND_OOBSIZE     64
 #define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif                         /* __CONFIG_H__ */
index 40ca9d602b958930c6499f4f4651fd379a3f8d77..2684b6c16c54a925f987c119deb18f81b6c09229 100644 (file)
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP            8
-#define CONFIG_PMECC_SECTOR_SIZE    512
 
 /* Ethernet Hardware */
 #define CONFIG_MACB
 #define CONFIG_SYS_NAND_OOBSIZE     64
 #define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif
index e2c2889acf928bb818aef4be9fd9d75d9ba8b7ec..e6ac098e279cac1895cfa0b4a861215546059a09 100644 (file)
@@ -96,8 +96,6 @@ CONFIG_ATMEL_LCD_BGR555
 CONFIG_ATMEL_LCD_RGB565
 CONFIG_ATMEL_LEGACY
 CONFIG_ATMEL_MCI_8BIT
-CONFIG_ATMEL_NAND_HWECC
-CONFIG_ATMEL_NAND_HW_PMECC
 CONFIG_ATMEL_SPI0
 CONFIG_AT_TRANS
 CONFIG_AUTO_ZRELADDR
@@ -1502,8 +1500,6 @@ CONFIG_PLATINUM_PROJECT
 CONFIG_PM
 CONFIG_PMC_BR_PRELIM
 CONFIG_PMC_OR_PRELIM
-CONFIG_PMECC_CAP
-CONFIG_PMECC_SECTOR_SIZE
 CONFIG_PME_PLAT_CLK_DIV
 CONFIG_PMU
 CONFIG_PMW_BASE
@@ -1868,7 +1864,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME
 CONFIG_SPL_FS_LOAD_KERNEL_NAME
 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
 CONFIG_SPL_GD_ADDR
-CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 CONFIG_SPL_INIT_MINIMAL
 CONFIG_SPL_JR0_LIODN_NS
 CONFIG_SPL_JR0_LIODN_S