clk: renesas: Fix broken clocks on all Gen2 boards

To prepare support for multiple register layouts pointers to register
tables where added to struct cpg_mssr_info. These pointers are suppose
to be filled in at probe time and no intended change in behavior was
intended.

However the new pointers where only filled in by some paths of the
driver implemented in clk-rcar-gen3.c. The path implemented in
clk-rcar-gen2.c was not updated leaving the pointers uninitialized
leading to a crash when trying to probe the clocks.

Fix this by filling in the pointers in the Gen2 code path with the
values used before they where moved to struct cpg_mssr_info.

Fixes: d413214fb748 ("clk: renesas: Add register pointers into struct cpg_mssr_info")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R8A7791 Porter
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c
index 66ffef96b695377b45398058211a9d4b5bc70127..89f2d9667469563831c10e51ebec825e7411cb5c 100644 (file)
--- a/drivers/clk/renesas/clk-rcar-gen2.c
+++ b/drivers/clk/renesas/clk-rcar-gen2.c
@@ -298,6 +298,15 @@ int gen2_clk_probe(struct udevice *dev)
        if (!priv->cpg_pll_config->extal_div)
                return -EINVAL;
 
+       if (info->reg_layout == CLK_REG_LAYOUT_RCAR_GEN2_AND_GEN3) {
+               priv->info->status_regs = mstpsr;
+               priv->info->control_regs = smstpcr;
+               priv->info->reset_regs = srcr;
+               priv->info->reset_clear_regs = srstclr;
+       } else {
+               return -EINVAL;
+       }
+
        ret = clk_get_by_name(dev, "extal", &priv->clk_extal);
        if (ret < 0)
                return ret;