]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: zynqmp: Add 'i2c-mux-idle-disconnect' property
authorRaviteja Narayanam <raviteja.narayanam@xilinx.com>
Thu, 1 Apr 2021 13:14:10 +0000 (07:14 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 19 May 2021 07:44:50 +0000 (09:44 +0200)
I2C muxes that have the slave devices with same address are
falling into the below problem.

VCK190 system controller (SC) - zynqmp-e-a2197-00-revA.dts
I2C1 (0xff030000) -> Mux1 (@0x74) -> Channel 3 -> 0x50
I2C1 (0xff030000) -> Mux2 (@0x75) -> Channel 0 -> 0x50

1. SC accesses I2C1 - Mux1 (0x74) - Channel 3 and then
2. SC accesses I2C1 - Mux2 (0x75) - Channel 0.

Now it results in 2 slave devices with same address (0x50)
on the I2C bus, making the communication un-reliable.

When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux
channel output is disconnected, making none of the channels
available to the I2C1. So, there is no question of having the
same addressed slave (0x50) present on the bus when we are doing '2'.

Same pattern is seen in below two boards also.

ZCU208 - zynqmp-zcu208-revA.dts
ZCU216 - zynqmp-zcu216-revA.dts

Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
arch/arm/dts/zynqmp-e-a2197-00-revA.dts
arch/arm/dts/zynqmp-zcu208-revA.dts
arch/arm/dts/zynqmp-zcu216-revA.dts

index ffa3dbb5f71f31e682128ebdb6ea4a9e22ebae54..8ec2e866535bc2939973474378229fadad9b5937 100644 (file)
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x74>;
+               i2c-mux-idle-disconnect;
                /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
                dc_i2c: i2c@0 { /* DC_I2C */
                        #address-cells = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x75>;
+               i2c-mux-idle-disconnect;
                i2c@0 { /* SFP0_IIC */
                        #address-cells = <1>;
                        #size-cells = <0>;
index 0e114cdacb1a31ce7cf368323b97b0638de04b1e..c24301090dde1aa0af5a7f78e0320c24a992b42f 100644 (file)
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x74>;
+               i2c-mux-idle-disconnect;
                /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
                i2c_eeprom: i2c@0 {
                        #address-cells = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x75>;
+               i2c-mux-idle-disconnect;
                /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
                i2c@0 {
                        #address-cells = <1>;
index 2302b07c4825c5bb0c927a716097bd5f1b2cd2ca..675baf4bed6150db72d390648f030eb5b602ed8d 100644 (file)
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x74>;
+               i2c-mux-idle-disconnect;
                /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
                i2c_eeprom: i2c@0 {
                        #address-cells = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x75>;
+               i2c-mux-idle-disconnect;
                /* FIXME reset-gpios = <&tca6416_u15 SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
                i2c@0 {
                        #address-cells = <1>;