ARM: dts: at91: sama7g5: add flx8 and required nodes

Add Flexcom8 node with required referenced nodes as phandles.
Since Flexcom8 is present in Linux, take the node exactly as-is from Linux.
Some nodes are referenced in Linux as phandles, the dma and the gic.
Add them as well to the file, even if they are unused by Uboot.
This is a step towards having the U-boot DT equivalent with the DT in Linux.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>

diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 4a3c675d344b025259e7365ac4ea96827c821261..2505a2f83d3d892e725f07e14a6521006aa104ce 100644 (file)
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -10,11 +10,15 @@
  */
 
 #include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clk/at91.h>
+#include <dt-bindings/dma/at91.h>
 
 / {
        model = "Microchip SAMA7G5 family SoC";
        compatible = "microchip,sama7g5";
+       interrupt-parent = <&gic>;
 
        clocks {
                slow_rc_osc: slow_rc_osc {
@@ -191,6 +195,52 @@
                                clock-names = "pclk", "hclk";
                                status = "disabled";
                        };
+
+                       dma0: dma-controller@e2808000 {
+                               compatible = "microchip,sama7g5-dma";
+                               reg = <0xe2808000 0x1000>;
+                               interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+                               #dma-cells = <1>;
+                               clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
+                               clock-names = "dma_clk";
+                               status = "disabled";
+                       };
+
+                       flx8: flexcom@e2818000 {
+                               compatible = "atmel,sama5d2-flexcom";
+                               reg = <0xe2818000 0x200>;
+                               clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0xe2818000 0x800>;
+                               status = "disabled";
+
+                               i2c8: i2c@600 {
+                                       compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
+                                       reg = <0x600 0x200>;
+                                       interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
+                                       atmel,fifo-size = <32>;
+                                       dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
+                                               <&dma0 AT91_XDMAC_DT_PERID(22)>;
+                                       dma-names = "rx", "tx";
+                                       atmel,use-dma-rx;
+                                       atmel,use-dma-tx;
+                                       status = "disabled";
+                               };
+                       };
+
+                       gic: interrupt-controller@e8c11000 {
+                               compatible = "arm,cortex-a7-gic";
+                               #interrupt-cells = <3>;
+                               #address-cells = <0>;
+                               interrupt-controller;
+                               interrupt-parent;
+                               reg = <0xe8c11000 0x1000>,
+                                       <0xe8c12000 0x2000>;
+                       };
                };
        };
 };