mmc: fsl_esdhc_imx: remove redundant ARCH_MXC

Now original fsl_esdhc.c are split as fsl_esdhc.c and fsl_esdhc_imx.c.
fsl_esdhc_imx.c only cover i.MX SoC. So ARCH_MXC is redundant.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index fcfbaa7d4043a662727af3a2cf667ad0b7cad228..29a945ed73011434f5418cf1cdcfb8bc8a0251db 100644 (file)
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -595,16 +595,12 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
        int sdhc_clk = priv->sdhc_clk;
        uint clk;
 
-       if (IS_ENABLED(ARCH_MXC)) {
 #if IS_ENABLED(CONFIG_MX53)
-               /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
-               pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 : 1;
+       /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
+       pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 : 1;
 #else
-               pre_div = 1;
+       pre_div = 1;
 #endif
-       } else {
-               pre_div = 2;
-       }
 
        while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock && pre_div < 256)
                pre_div *= 2;
@@ -1007,11 +1003,6 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
                esdhc_write32(&regs->dllctrl, 0x0);
        }
 
-#ifndef ARCH_MXC
-       /* Enable cache snooping */
-       esdhc_write32(&regs->scr, 0x00000040);
-#endif
-
        if (IS_ENABLED(CONFIG_FSL_USDHC))
                esdhc_setbits32(&regs->vendorspec,
                                VENDORSPEC_HCKEN | VENDORSPEC_IPGEN);