CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_MMC is not set
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_SMSC=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
CONFIG_MVNETA=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_SPI_FLASH_MACRONIX=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_DM_ETH=y
CONFIG_SH_ETHER=y
CONFIG_PINCTRL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_BITBANGMII=y
+CONFIG_BITBANGMII_MULTI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
config BITBANGMII
bool "Bit-banged ethernet MII management channel support"
+config BITBANGMII_MULTI
+ bool "Enable the multi bus support"
+ depends on BITBANGMII
+
config MV88E6352_SWITCH
bool "Marvell 88E6352 switch support"
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
#define CONFIG_SH_ETHER_SH7734_MII (0x01)
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk()
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Environment compatibility */
/* SH Ether */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
#define CONFIG_PCI_SCAN_SHOW
#endif
-/*
- * Software (bit-bang) MII driver configuration
- */
-#define CONFIG_BITBANGMII_MULTI
-
/* SPL */
/*
* Select the boot device here
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Environment compatibility */
/* Board Clock */
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#define GICD_BASE 0xF1000000
#define GICR_BASE 0xF1060000
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Board Clock */
/* XTAL_CLK : 16.66MHz */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
#endif /* __GRPEACH_H */
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
#include "rcar-gen3-common.h"
-/* Ethernet RAVB */
-#define CONFIG_BITBANGMII_MULTI
-
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */