]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
rockchip: rk3288-power: sync power domain dt-binding header from Linux
authorJohan Jonker <jbx6244@gmail.com>
Fri, 15 Apr 2022 21:21:37 +0000 (23:21 +0200)
committerKever Yang <kever.yang@rock-chips.com>
Mon, 18 Apr 2022 03:25:13 +0000 (11:25 +0800)
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3288.dtsi
include/dt-bindings/power-domain/rk3288.h [deleted file]
include/dt-bindings/power/rk3288-power.h [new file with mode: 0644]

index 22bb06cec5b5311fd06f3e1ec0bf59d42071baed..2086dbfda444355e8787c6c216d24cfad176ef34 100644 (file)
@@ -5,7 +5,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3288-cru.h>
-#include <dt-bindings/power-domain/rk3288.h>
+#include <dt-bindings/power/rk3288-power.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/video/rk3288.h>
 #include "skeleton.dtsi"
diff --git a/include/dt-bindings/power-domain/rk3288.h b/include/dt-bindings/power-domain/rk3288.h
deleted file mode 100644 (file)
index ca68c11..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef __DT_BINDINGS_POWER_DOMAIN_RK3288_H__
-#define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__
-
-/* RK3288 power domain index */
-#define RK3288_PD_GPU          0
-#define RK3288_PD_VIO          1
-#define RK3288_PD_VIDEO        2
-#define RK3288_PD_HEVC         3
-#define RK3288_PD_PERI         4
-
-#endif
diff --git a/include/dt-bindings/power/rk3288-power.h b/include/dt-bindings/power/rk3288-power.h
new file mode 100644 (file)
index 0000000..f710b56
--- /dev/null
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK3288_POWER_H__
+#define __DT_BINDINGS_POWER_RK3288_POWER_H__
+
+/**
+ * RK3288 Power Domain and Voltage Domain Summary.
+ */
+
+/* VD_CORE */
+#define RK3288_PD_A17_0                0
+#define RK3288_PD_A17_1                1
+#define RK3288_PD_A17_2                2
+#define RK3288_PD_A17_3                3
+#define RK3288_PD_SCU          4
+#define RK3288_PD_DEBUG                5
+#define RK3288_PD_MEM          6
+
+/* VD_LOGIC */
+#define RK3288_PD_BUS          7
+#define RK3288_PD_PERI         8
+#define RK3288_PD_VIO          9
+#define RK3288_PD_ALIVE                10
+#define RK3288_PD_HEVC         11
+#define RK3288_PD_VIDEO                12
+
+/* VD_GPU */
+#define RK3288_PD_GPU          13
+
+/* VD_PMU */
+#define RK3288_PD_PMU          14
+
+#endif