arm: mvebu: Define all BOOTROM_ERR_MODE_* macros

A385 BootROM fills into bits [31:28] of register 0x182d0 tracing value,
which represents in which state BootROM currently is. BootROM fills one
of the possible values: 0x2 (CPU initialization), 0x3 (UART detection),
0x6 (UART booting), 0x8 (PCI Express booting), 0x9 (parallel or SPI NOR
booting), 0xA (parallel or SPI NAND booting), 0xB (SATA booting) and 0xE
(SD / eMMC booting).

Meaning of these values matches TRACE_* macros from Marvell soc_spec.h file:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/blob/u-boot-2013.01-armada-18.06/tools/marvell/doimage_mv/soc_spec.h

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index b02e305522762c874cdb3f832b5b44096827b6ef..c04fa339c31e6f528feab54c54ec5f7c85982629 100644 (file)
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -128,7 +128,14 @@
 #define BOOTROM_ERR_REG                (MVEBU_REGISTER(0x182d0))
 #define BOOTROM_ERR_MODE_OFFS  28
 #define BOOTROM_ERR_MODE_MASK  (0xf << BOOTROM_ERR_MODE_OFFS)
+#define BOOTROM_ERR_MODE_MAIN  0x2
+#define BOOTROM_ERR_MODE_EXEC  0x3
 #define BOOTROM_ERR_MODE_UART  0x6
+#define BOOTROM_ERR_MODE_PEX   0x8
+#define BOOTROM_ERR_MODE_NOR   0x9
+#define BOOTROM_ERR_MODE_NAND  0xA
+#define BOOTROM_ERR_MODE_SATA  0xB
+#define BOOTROM_ERR_MODE_MMC   0xE
 #define BOOTROM_ERR_CODE_OFFS  0
 #define BOOTROM_ERR_CODE_MASK  (0xf << BOOTROM_ERR_CODE_OFFS)