clk: actions: Add Ethernet clocks

This commit adds clocks needed for ethernet operations for
Actions OWL family of SoCs (S700 and S900).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>

diff --git a/arch/arm/include/asm/arch-owl/regs_s700.h b/arch/arm/include/asm/arch-owl/regs_s700.h
index 2f21c15cca8c170e59e90e1f4bb8495b9ef66d0d..90459ae95eeba39e6edd2e3129e40f67bd7b1bb1 100644 (file)
--- a/arch/arm/include/asm/arch-owl/regs_s700.h
+++ b/arch/arm/include/asm/arch-owl/regs_s700.h
@@ -53,4 +53,6 @@
 #define CMU_CVBSPLL            0x00B8
 #define CMU_SSTSCLK            0x00C0
 
+#define CMU_DEVCLKEN1_ETH      BIT(23)
+
 #endif

diff --git a/arch/arm/include/asm/arch-owl/regs_s900.h b/arch/arm/include/asm/arch-owl/regs_s900.h
index 9e9106ddaab9e121fa0a367495e91e3922e1e48d..084bc9b8c3fb9c13931daa68350fdf73cd6c7fb5 100644 (file)
--- a/arch/arm/include/asm/arch-owl/regs_s900.h
+++ b/arch/arm/include/asm/arch-owl/regs_s900.h
@@ -61,4 +61,8 @@
 #define CMU_TVOUTPLLDEBUG0                     (0x00EC)
 #define CMU_TVOUTPLLDEBUG1                     (0x00FC)
 
+#define CMU_DEVCLKEN1_ETH                      BIT(22)
+#define CLK_ETHERNET                           CLK_ETH_MAC
+#define CMU_ETHERNETPLL                                CMU_ASSISTPLL
+
 #endif

diff --git a/drivers/clk/owl/clk_owl.c b/drivers/clk/owl/clk_owl.c
index 9715fce162157bbd5c21dd7bb094fde819ba5e0c..1999c87a336059aa6033d860c5d10420a8a4ea7d 100644 (file)
--- a/drivers/clk/owl/clk_owl.c
+++ b/drivers/clk/owl/clk_owl.c
@@ -87,6 +87,11 @@ int owl_clk_enable(struct clk *clk)
                /* Enable UART3 interface clock */
                setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
                break;
+       case CLK_RMII_REF:
+       case CLK_ETHERNET:
+               setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_ETH);
+               setbits_le32(priv->base + CMU_ETHERNETPLL, 5);
+               break;
        default:
                return -EINVAL;
        }
@@ -112,6 +117,10 @@ int owl_clk_disable(struct clk *clk)
                /* Disable UART3 interface clock */
                clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
                break;
+       case CLK_RMII_REF:
+       case CLK_ETHERNET:
+               clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_ETH);
+               break;
        default:
                return -EINVAL;
        }

diff --git a/drivers/clk/owl/clk_owl.h b/drivers/clk/owl/clk_owl.h
index cf896bdb98e4d4c87bc6f6cb1e95d3ce0bd0724d..a01f81a6a7bee7bff7fb05b65b06c6eff3c74693 100644 (file)
--- a/drivers/clk/owl/clk_owl.h
+++ b/drivers/clk/owl/clk_owl.h
@@ -62,6 +62,4 @@ struct owl_clk_priv {
 #define CMU_DEVCLKEN1_UART5    BIT(21)
 #define CMU_DEVCLKEN1_UART3    BIT(11)
 
-#define CMU_DEVCLKEN1_ETH_S700 BIT(23)
-
 #endif