]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
net: ethernet: ti: am65-cpsw-nuss: enable 10Mbps link speed in rgmii mode
authorMurali Karicheri <m-karicheri2@ti.com>
Fri, 17 Apr 2020 15:12:09 +0000 (11:12 -0400)
committerLokesh Vutla <lokeshvutla@ti.com>
Sat, 9 May 2020 14:28:58 +0000 (19:58 +0530)
In RGMII mode the 10Mbps link speed is supported only when CPSW2G MAC SL is
configured for External Control ("in band") mode
CPSW_PN_MAC_CONTROL_REG.CTL_EN(18) = 1

Hence update am65_cpsw_update_link() to follow documentation.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
drivers/net/ti/am65-cpsw-nuss.c

index 2b77213001f5a2d7c48bf1e05a9ee56fbad9928c..7531a072034488e0594cb718d163384c051ecffa 100644 (file)
@@ -61,6 +61,7 @@
 
 #define AM65_CPSW_MACSL_CTL_REG                        0x0
 #define AM65_CPSW_MACSL_CTL_REG_IFCTL_A                BIT(15)
+#define AM65_CPSW_MACSL_CTL_EXT_EN             BIT(18)
 #define AM65_CPSW_MACSL_CTL_REG_GIG            BIT(7)
 #define AM65_CPSW_MACSL_CTL_REG_GMII_EN                BIT(5)
 #define AM65_CPSW_MACSL_CTL_REG_LOOPBACK       BIT(1)
@@ -187,6 +188,9 @@ static int am65_cpsw_update_link(struct am65_cpsw_priv *priv)
                              AM65_CPSW_MACSL_CTL_REG_GMII_EN;
                if (phy->speed == 1000)
                        mac_control |= AM65_CPSW_MACSL_CTL_REG_GIG;
+               if (phy->speed == 10 && phy_interface_is_rgmii(phy))
+                       /* Can be used with in band mode only */
+                       mac_control |= AM65_CPSW_MACSL_CTL_EXT_EN;
                if (phy->duplex == DUPLEX_FULL)
                        mac_control |= AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEX;
                if (phy->speed == 100)