am33xx: Stop modifying certain EMIF4D registers

Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified.  This has been tested
on AM335x GP EVM and Beaglebone White.

[1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Matt Porter <matt.porter@linaro.org>

diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index fa697c74abf2dc3503cdbcb2ba50f907f9036324..5b0454c3eab661bfaa1daab184d5c1b591a6d45a 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -89,15 +89,12 @@ void config_ddr_phy(const struct emif_regs *regs, int nr)
 void config_cmd_ctrl(const struct cmd_control *cmd, int nr)
 {
        writel(cmd->cmd0csratio, &ddr_cmd_reg[nr]->cm0csratio);
-       writel(cmd->cmd0dldiff, &ddr_cmd_reg[nr]->cm0dldiff);
        writel(cmd->cmd0iclkout, &ddr_cmd_reg[nr]->cm0iclkout);
 
        writel(cmd->cmd1csratio, &ddr_cmd_reg[nr]->cm1csratio);
-       writel(cmd->cmd1dldiff, &ddr_cmd_reg[nr]->cm1dldiff);
        writel(cmd->cmd1iclkout, &ddr_cmd_reg[nr]->cm1iclkout);
 
        writel(cmd->cmd2csratio, &ddr_cmd_reg[nr]->cm2csratio);
-       writel(cmd->cmd2dldiff, &ddr_cmd_reg[nr]->cm2dldiff);
        writel(cmd->cmd2iclkout, &ddr_cmd_reg[nr]->cm2iclkout);
 }
 
@@ -121,10 +118,6 @@ void config_ddr_data(const struct ddr_data *data, int nr)
                        &(ddr_data_reg[nr]+i)->dt0fwsratio0);
                writel(data->datawrsratio0,
                        &(ddr_data_reg[nr]+i)->dt0wrsratio0);
-               writel(data->datauserank0delay,
-                       &(ddr_data_reg[nr]+i)->dt0rdelays0);
-               writel(data->datadldiff0,
-                       &(ddr_data_reg[nr]+i)->dt0dldiff0);
        }
 }
 

diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index f56d1e07cc8b1f0f4fefaa86a038e1f1c16e203c..2278358ab200ecc26fc7500e01b11268fe7d43f5 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -18,7 +18,6 @@
 #define VTP_CTRL_READY         (0x1 << 5)
 #define VTP_CTRL_ENABLE                (0x1 << 6)
 #define VTP_CTRL_START_EN      (0x1)
-#define PHY_DLL_LOCK_DIFF      0x0
 #define DDR_CKE_CTRL_NORMAL    0x1
 #define PHY_EN_DYN_PWRDN       (0x1 << 20)
 
@@ -29,7 +28,6 @@
 #define MT47H128M16RT25E_EMIF_TIM3             0x0000033F
 #define MT47H128M16RT25E_EMIF_SDCFG            0x41805332
 #define MT47H128M16RT25E_EMIF_SDREF            0x0000081a
-#define MT47H128M16RT25E_DLL_LOCK_DIFF         0x0
 #define MT47H128M16RT25E_RATIO                 0x80
 #define MT47H128M16RT25E_INVERT_CLKOUT         0x00
 #define MT47H128M16RT25E_RD_DQS                        0x12
@@ -38,7 +36,6 @@
 #define MT47H128M16RT25E_PHY_GATELVL           0x00
 #define MT47H128M16RT25E_PHY_WR_DATA           0x40
 #define MT47H128M16RT25E_PHY_FIFO_WE           0x80
-#define MT47H128M16RT25E_PHY_RANK0_DELAY               0x1
 #define MT47H128M16RT25E_IOCTRL_VALUE          0x18B
 
 /* Micron MT41J128M16JT-125 */
@@ -49,7 +46,6 @@
 #define MT41J128MJT125_EMIF_SDCFG              0x61C04AB2
 #define MT41J128MJT125_EMIF_SDREF              0x0000093B
 #define MT41J128MJT125_ZQ_CFG                  0x50074BE4
-#define MT41J128MJT125_DLL_LOCK_DIFF           0x1
 #define MT41J128MJT125_RATIO                   0x40
 #define MT41J128MJT125_INVERT_CLKOUT           0x1
 #define MT41J128MJT125_RD_DQS                  0x3B
@@ -72,7 +68,6 @@
 #define MT41J256M8HX15E_EMIF_SDCFG             0x61C04B32
 #define MT41J256M8HX15E_EMIF_SDREF             0x0000093B
 #define MT41J256M8HX15E_ZQ_CFG                 0x50074BE4
-#define MT41J256M8HX15E_DLL_LOCK_DIFF          0x1
 #define MT41J256M8HX15E_RATIO                  0x40
 #define MT41J256M8HX15E_INVERT_CLKOUT          0x1
 #define MT41J256M8HX15E_RD_DQS                 0x3B
@@ -89,7 +84,6 @@
 #define MT41K256M16HA125E_EMIF_SDCFG           0x61C05332
 #define MT41K256M16HA125E_EMIF_SDREF           0xC30
 #define MT41K256M16HA125E_ZQ_CFG               0x50074BE4
-#define MT41K256M16HA125E_DLL_LOCK_DIFF                0x1
 #define MT41K256M16HA125E_RATIO                        0x80
 #define MT41K256M16HA125E_INVERT_CLKOUT                0x0
 #define MT41K256M16HA125E_RD_DQS               0x38
@@ -106,7 +100,6 @@
 #define MT41J512M8RH125_EMIF_SDCFG             0x61C04BB2
 #define MT41J512M8RH125_EMIF_SDREF             0x0000093B
 #define MT41J512M8RH125_ZQ_CFG                 0x50074BE4
-#define MT41J512M8RH125_DLL_LOCK_DIFF          0x1
 #define MT41J512M8RH125_RATIO                  0x80
 #define MT41J512M8RH125_INVERT_CLKOUT          0x0
 #define MT41J512M8RH125_RD_DQS                 0x3B
@@ -123,7 +116,6 @@
 #define K4B2G1646EBIH9_EMIF_SDCFG              0x61C052B2
 #define K4B2G1646EBIH9_EMIF_SDREF              0x00000C30
 #define K4B2G1646EBIH9_ZQ_CFG                  0x50074BE4
-#define K4B2G1646EBIH9_DLL_LOCK_DIFF           0x1
 #define K4B2G1646EBIH9_RATIO                   0x80
 #define K4B2G1646EBIH9_INVERT_CLKOUT           0x0
 #define K4B2G1646EBIH9_RD_DQS                  0x35
@@ -155,18 +147,15 @@ void config_ddr_phy(const struct emif_regs *regs, int nr);
 struct ddr_cmd_regs {
        unsigned int resv0[7];
        unsigned int cm0csratio;        /* offset 0x01C */
-       unsigned int resv1[2];
-       unsigned int cm0dldiff;         /* offset 0x028 */
+       unsigned int resv1[3];
        unsigned int cm0iclkout;        /* offset 0x02C */
        unsigned int resv2[8];
        unsigned int cm1csratio;        /* offset 0x050 */
-       unsigned int resv3[2];
-       unsigned int cm1dldiff;         /* offset 0x05C */
+       unsigned int resv3[3];
        unsigned int cm1iclkout;        /* offset 0x060 */
        unsigned int resv4[8];
        unsigned int cm2csratio;        /* offset 0x084 */
-       unsigned int resv5[2];
-       unsigned int cm2dldiff;         /* offset 0x090 */
+       unsigned int resv5[3];
        unsigned int cm2iclkout;        /* offset 0x094 */
        unsigned int resv6[3];
 };
@@ -203,24 +192,21 @@ struct ddr_regs {
        unsigned int cm0configclk;      /* offset 0x010 */
        unsigned int resv1[2];
        unsigned int cm0csratio;        /* offset 0x01C */
-       unsigned int resv2[2];
-       unsigned int cm0dldiff;         /* offset 0x028 */
+       unsigned int resv2[3];
        unsigned int cm0iclkout;        /* offset 0x02C */
        unsigned int resv3[4];
        unsigned int cm1config;         /* offset 0x040 */
        unsigned int cm1configclk;      /* offset 0x044 */
        unsigned int resv4[2];
        unsigned int cm1csratio;        /* offset 0x050 */
-       unsigned int resv5[2];
-       unsigned int cm1dldiff;         /* offset 0x05C */
+       unsigned int resv5[3];
        unsigned int cm1iclkout;        /* offset 0x060 */
        unsigned int resv6[4];
        unsigned int cm2config;         /* offset 0x074 */
        unsigned int cm2configclk;      /* offset 0x078 */
        unsigned int resv7[2];
        unsigned int cm2csratio;        /* offset 0x084 */
-       unsigned int resv8[2];
-       unsigned int cm2dldiff;         /* offset 0x090 */
+       unsigned int resv8[3];
        unsigned int cm2iclkout;        /* offset 0x094 */
        unsigned int resv9[12];
        unsigned int dt0rdsratio0;      /* offset 0x0C8 */
@@ -249,17 +235,14 @@ struct cmd_control {
        unsigned long cmd0csratio;
        unsigned long cmd0csforce;
        unsigned long cmd0csdelay;
-       unsigned long cmd0dldiff;
        unsigned long cmd0iclkout;
        unsigned long cmd1csratio;
        unsigned long cmd1csforce;
        unsigned long cmd1csdelay;
-       unsigned long cmd1dldiff;
        unsigned long cmd1iclkout;
        unsigned long cmd2csratio;
        unsigned long cmd2csforce;
        unsigned long cmd2csdelay;
-       unsigned long cmd2dldiff;
        unsigned long cmd2iclkout;
 };
 
@@ -273,8 +256,6 @@ struct ddr_data {
        unsigned long datagiratio0;
        unsigned long datafwsratio0;
        unsigned long datawrsratio0;
-       unsigned long datauserank0delay;
-       unsigned long datadldiff0;
 };
 
 /**

diff --git a/board/compulab/cm_t335/spl.c b/board/compulab/cm_t335/spl.c
index b62e58a7ebcc8c8b6e3105a3544c421881d2d592..99f3a869bbca2f6aa717c584c49061a12ae1c315 100644 (file)
--- a/board/compulab/cm_t335/spl.c
+++ b/board/compulab/cm_t335/spl.c
@@ -25,20 +25,16 @@ static const struct ddr_data ddr3_data = {
        .datawdsratio0          = MT41J128MJT125_WR_DQS,
        .datafwsratio0          = MT41J128MJT125_PHY_FIFO_WE,
        .datawrsratio0          = MT41J128MJT125_PHY_WR_DATA,
-       .datadldiff0            = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct cmd_control ddr3_cmd_ctrl_data = {
        .cmd0csratio            = MT41J128MJT125_RATIO,
-       .cmd0dldiff             = MT41J128MJT125_DLL_LOCK_DIFF,
        .cmd0iclkout            = MT41J128MJT125_INVERT_CLKOUT,
 
        .cmd1csratio            = MT41J128MJT125_RATIO,
-       .cmd1dldiff             = MT41J128MJT125_DLL_LOCK_DIFF,
        .cmd1iclkout            = MT41J128MJT125_INVERT_CLKOUT,
 
        .cmd2csratio            = MT41J128MJT125_RATIO,
-       .cmd2dldiff             = MT41J128MJT125_DLL_LOCK_DIFF,
        .cmd2iclkout            = MT41J128MJT125_INVERT_CLKOUT,
 };
 

diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c
index 0b8356dc47b1cbe0b2e07aa2e37e77c951a34986..6a8ca2b4c39ba90e02dd81db10e3c20aa1f74dd8 100644 (file)
--- a/board/isee/igep0033/board.c
+++ b/board/isee/igep0033/board.c
@@ -35,20 +35,16 @@ static const struct ddr_data ddr3_data = {
        .datawdsratio0 = K4B2G1646EBIH9_WR_DQS,
        .datafwsratio0 = K4B2G1646EBIH9_PHY_FIFO_WE,
        .datawrsratio0 = K4B2G1646EBIH9_PHY_WR_DATA,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct cmd_control ddr3_cmd_ctrl_data = {
        .cmd0csratio = K4B2G1646EBIH9_RATIO,
-       .cmd0dldiff = K4B2G1646EBIH9_DLL_LOCK_DIFF,
        .cmd0iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
 
        .cmd1csratio = K4B2G1646EBIH9_RATIO,
-       .cmd1dldiff = K4B2G1646EBIH9_DLL_LOCK_DIFF,
        .cmd1iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
 
        .cmd2csratio = K4B2G1646EBIH9_RATIO,
-       .cmd2dldiff = K4B2G1646EBIH9_DLL_LOCK_DIFF,
        .cmd2iclkout = K4B2G1646EBIH9_INVERT_CLKOUT,
 };
 

diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index bd1bb70939d3ed65d9209e7affdaf2f5406da27c..6a27e56d11acac9dae3579c534865f02c4030210 100644 (file)
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -55,20 +55,16 @@ static const struct ddr_data ddr3_data = {
        .datawdsratio0 = MT41J256M8HX15E_WR_DQS,
        .datafwsratio0 = MT41J256M8HX15E_PHY_FIFO_WE,
        .datawrsratio0 = MT41J256M8HX15E_PHY_WR_DATA,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct cmd_control ddr3_cmd_ctrl_data = {
        .cmd0csratio = MT41J256M8HX15E_RATIO,
-       .cmd0dldiff = MT41J256M8HX15E_DLL_LOCK_DIFF,
        .cmd0iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
 
        .cmd1csratio = MT41J256M8HX15E_RATIO,
-       .cmd1dldiff = MT41J256M8HX15E_DLL_LOCK_DIFF,
        .cmd1iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
 
        .cmd2csratio = MT41J256M8HX15E_RATIO,
-       .cmd2dldiff = MT41J256M8HX15E_DLL_LOCK_DIFF,
        .cmd2iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
 };
 
@@ -94,20 +90,16 @@ static const struct ddr_data ddr3_data = {
        .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
        .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
        .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct cmd_control ddr3_cmd_ctrl_data = {
        .cmd0csratio = MT41K256M16HA125E_RATIO,
-       .cmd0dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF,
        .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 
        .cmd1csratio = MT41K256M16HA125E_RATIO,
-       .cmd1dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF,
        .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 
        .cmd2csratio = MT41K256M16HA125E_RATIO,
-       .cmd2dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF,
        .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 };
 

diff --git a/board/siemens/dxr2/board.c b/board/siemens/dxr2/board.c
index 1773ab77d00cff34a61b08793d87581309ea875f..3a5e11dc816d7fc107de7252262ab06ac2d4d2a1 100644 (file)
--- a/board/siemens/dxr2/board.c
+++ b/board/siemens/dxr2/board.c
@@ -140,13 +140,9 @@ struct emif_regs dxr2_ddr3_emif_reg_data = {
 };
 
 struct ddr_data dxr2_ddr3_data = {
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 struct cmd_control dxr2_ddr3_cmd_ctrl_data = {
-       .cmd0dldiff = 0,
-       .cmd1dldiff = 0,
-       .cmd2dldiff = 0,
 };
        /* pass values from eeprom */
        dxr2_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;

diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c
index 094b4d6d368cd68282219a1ca92b8c07ece81d60..0a25b4b40cc7d417c0df811c3618528ecbc733b0 100644 (file)
--- a/board/siemens/pxm2/board.c
+++ b/board/siemens/pxm2/board.c
@@ -58,19 +58,14 @@ struct ddr_data pxm2_ddr3_data = {
        .datawdsratio0 = 0,
        .datafwsratio0 = 0x8020080,
        .datawrsratio0 = 0x4010040,
-       .datauserank0delay = 1,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 struct cmd_control pxm2_ddr3_cmd_ctrl_data = {
        .cmd0csratio = 0x80,
-       .cmd0dldiff = 0,
        .cmd0iclkout = 0,
        .cmd1csratio = 0x80,
-       .cmd1dldiff = 0,
        .cmd1iclkout = 0,
        .cmd2csratio = 0x80,
-       .cmd2dldiff = 0,
        .cmd2iclkout = 0,
 };
 

diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c
index 0cf17ef5b6ac91ff15f0b347e4d92af0dfc35858..77592dbba886946ade6c977d24d3bfedd86aa9a2 100644 (file)
--- a/board/siemens/rut/board.c
+++ b/board/siemens/rut/board.c
@@ -63,19 +63,14 @@ struct ddr_data rut_ddr3_data = {
        .datawdsratio0 = 0x85,
        .datafwsratio0 = 0x100,
        .datawrsratio0 = 0xc1,
-       .datauserank0delay = 1,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 struct cmd_control rut_ddr3_cmd_ctrl_data = {
        .cmd0csratio = 0x40,
-       .cmd0dldiff = 0,
        .cmd0iclkout = 1,
        .cmd1csratio = 0x40,
-       .cmd1dldiff = 0,
        .cmd1iclkout = 1,
        .cmd2csratio = 0x40,
-       .cmd2dldiff = 0,
        .cmd2iclkout = 1,
 };
 

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 57fedab340af29e767245aec6768d316104867a3..1459fae253f4f11ca9e5d5d8c4a4ba21ae82fa68 100644 (file)
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -107,21 +107,16 @@ static const struct ddr_data ddr2_data = {
                          (MT47H128M16RT25E_PHY_WR_DATA<<20) |
                          (MT47H128M16RT25E_PHY_WR_DATA<<10) |
                          (MT47H128M16RT25E_PHY_WR_DATA<<0)),
-       .datauserank0delay = MT47H128M16RT25E_PHY_RANK0_DELAY,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct cmd_control ddr2_cmd_ctrl_data = {
        .cmd0csratio = MT47H128M16RT25E_RATIO,
-       .cmd0dldiff = MT47H128M16RT25E_DLL_LOCK_DIFF,
        .cmd0iclkout = MT47H128M16RT25E_INVERT_CLKOUT,
 
        .cmd1csratio = MT47H128M16RT25E_RATIO,
-       .cmd1dldiff = MT47H128M16RT25E_DLL_LOCK_DIFF,
        .cmd1iclkout = MT47H128M16RT25E_INVERT_CLKOUT,
 
        .cmd2csratio = MT47H128M16RT25E_RATIO,
-       .cmd2dldiff = MT47H128M16RT25E_DLL_LOCK_DIFF,
        .cmd2iclkout = MT47H128M16RT25E_INVERT_CLKOUT,
 };
 
@@ -139,7 +134,6 @@ static const struct ddr_data ddr3_data = {
        .datawdsratio0 = MT41J128MJT125_WR_DQS,
        .datafwsratio0 = MT41J128MJT125_PHY_FIFO_WE,
        .datawrsratio0 = MT41J128MJT125_PHY_WR_DATA,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct ddr_data ddr3_beagleblack_data = {
@@ -147,7 +141,6 @@ static const struct ddr_data ddr3_beagleblack_data = {
        .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
        .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
        .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct ddr_data ddr3_evm_data = {
@@ -155,48 +148,38 @@ static const struct ddr_data ddr3_evm_data = {
        .datawdsratio0 = MT41J512M8RH125_WR_DQS,
        .datafwsratio0 = MT41J512M8RH125_PHY_FIFO_WE,
        .datawrsratio0 = MT41J512M8RH125_PHY_WR_DATA,
-       .datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 
 static const struct cmd_control ddr3_cmd_ctrl_data = {
        .cmd0csratio = MT41J128MJT125_RATIO,
-       .cmd0dldiff = MT41J128MJT125_DLL_LOCK_DIFF,
        .cmd0iclkout = MT41J128MJT125_INVERT_CLKOUT,
 
        .cmd1csratio = MT41J128MJT125_RATIO,
-       .cmd1dldiff = MT41J128MJT125_DLL_LOCK_DIFF,
        .cmd1iclkout = MT41J128MJT125_INVERT_CLKOUT,
 
        .cmd2csratio = MT41J128MJT125_RATIO,
-       .cmd2dldiff = MT41J128MJT125_DLL_LOCK_DIFF,
        .cmd2iclkout = MT41J128MJT125_INVERT_CLKOUT,
 };
 
 static const struct cmd_control ddr3_beagleblack_cmd_ctrl_data = {
        .cmd0csratio = MT41K256M16HA125E_RATIO,
-       .cmd0dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF,
        .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 
        .cmd1csratio = MT41K256M16HA125E_RATIO,
-       .cmd1dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF,
        .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 
        .cmd2csratio = MT41K256M16HA125E_RATIO,
-       .cmd2dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF,
        .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
 };
 
 static const struct cmd_control ddr3_evm_cmd_ctrl_data = {
        .cmd0csratio = MT41J512M8RH125_RATIO,
-       .cmd0dldiff = MT41J512M8RH125_DLL_LOCK_DIFF,
        .cmd0iclkout = MT41J512M8RH125_INVERT_CLKOUT,
 
        .cmd1csratio = MT41J512M8RH125_RATIO,
-       .cmd1dldiff = MT41J512M8RH125_DLL_LOCK_DIFF,
        .cmd1iclkout = MT41J512M8RH125_INVERT_CLKOUT,
 
        .cmd2csratio = MT41J512M8RH125_RATIO,
-       .cmd2dldiff = MT41J512M8RH125_DLL_LOCK_DIFF,
        .cmd2iclkout = MT41J512M8RH125_INVERT_CLKOUT,
 };
 

diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index e406326a11eeca4de1208c9df1f0a39e149122c3..0b76a7790598849fe4d858bc7c3d7b6ccdc26805 100644 (file)
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -33,15 +33,12 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 #ifdef CONFIG_SPL_BUILD
 static const struct cmd_control evm_ddr2_cctrl_data = {
        .cmd0csratio    = 0x80,
-       .cmd0dldiff     = 0x04,
        .cmd0iclkout    = 0x00,
 
        .cmd1csratio    = 0x80,
-       .cmd1dldiff     = 0x04,
        .cmd1iclkout    = 0x00,
 
        .cmd2csratio    = 0x80,
-       .cmd2dldiff     = 0x04,
        .cmd2iclkout    = 0x00,
 };
 
@@ -77,8 +74,6 @@ static const struct ddr_data evm_ddr2_data = {
        .datagiratio0           = ((0<<10) | (0<<0)),
        .datafwsratio0          = ((0x90<<10) | (0x90<<0)),
        .datawrsratio0          = ((0x50<<10) | (0x50<<0)),
-       .datauserank0delay      = 1,
-       .datadldiff0            = 0x4,
 };
 
 void set_uart_mux_conf(void)

diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
index 74d35e936d579801b0e5a2e326c8dc5d4b41027d..a53859e52e4a923c639aebfaba937648ad73474b 100644 (file)
--- a/board/ti/ti816x/evm.c
+++ b/board/ti/ti816x/evm.c
@@ -59,21 +59,16 @@ static struct ddr_data ddr2_data = {
        .datagiratio0           = ((0x0<<10) | (0x0<<0)),
        .datafwsratio0          = ((0x13A<<10) | (0x13A<<0)),
        .datawrsratio0          = ((0x8A<<10) | (0x8A<<0)),
-       .datauserank0delay      = 0x1,
-       .datadldiff0            = 0x0, /* depend on cpu rev, set later */
 };
 
 static struct cmd_control ddr2_ctrl = {
        .cmd0csratio    = 0x80,
-       .cmd0dldiff     = 0x04, /* reset value is 0x4 */
        .cmd0iclkout    = 0x00,
 
        .cmd1csratio    = 0x80,
-       .cmd1dldiff     = 0x04, /* reset value is 0x4 */
        .cmd1iclkout    = 0x00,
 
        .cmd2csratio    = 0x80,
-       .cmd2dldiff     = 0x04, /* reset value is 0x4 */
        .cmd2iclkout    = 0x00,
 
 };
@@ -150,21 +145,16 @@ static struct ddr_data ddr3_data = {
        .datagiratio0           = ((0x20<<10) | 0x20<<0),
        .datafwsratio0          = ((RD_DQS_GATE<<10) | (RD_DQS_GATE<<0)),
        .datawrsratio0          = (((WR_DQS+0x40)<<10) | ((WR_DQS+0x40)<<0)),
-       .datauserank0delay      = 0x1,
-       .datadldiff0            = 0x0, /* depend on cpu rev, set later */
 };
 
 static const struct cmd_control ddr3_ctrl = {
        .cmd0csratio    = 0x100,
-       .cmd0dldiff     = 0x004, /* reset value is 0x4 */
        .cmd0iclkout    = 0x001,
 
        .cmd1csratio    = 0x100,
-       .cmd1dldiff     = 0x004, /* reset value is 0x4 */
        .cmd1iclkout    = 0x001,
 
        .cmd2csratio    = 0x100,
-       .cmd2dldiff     = 0x004, /* reset value is 0x4 */
        .cmd2iclkout    = 0x001,
 };
 
@@ -198,11 +188,6 @@ void sdram_init(void)
        config_dmm(&evm_lisa_map_regs);
 
 #ifdef CONFIG_TI816X_EVM_DDR2
-       ddr2_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-       ddr2_ctrl.cmd0dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-       ddr2_ctrl.cmd1dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-       ddr2_ctrl.cmd2dldiff = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
        if (CONFIG_TI816X_USE_EMIF0) {
                ddr2_emif0_regs.emif_ddr_phy_ctlr_1 =
                        (get_cpu_rev() == 0x1 ? 0x0000010B : 0x0000030B);
@@ -217,8 +202,6 @@ void sdram_init(void)
 #endif
 
 #ifdef CONFIG_TI816X_EVM_DDR3
-       ddr3_data.datadldiff0 = (get_cpu_rev() == 0x1 ? 0x0 : 0xF);
-
        if (CONFIG_TI816X_USE_EMIF0)
                config_ddr(0, 0, &ddr3_data, &ddr3_ctrl, &ddr3_emif0_regs, 0);