arm: dts: k3-am654: Update power-domains property for each node

Update the power-domain-cells to 2 and add the permissions
to each node. Mark the following nodes accessed by r5 as shared:
- DDR node
- main uart 0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index 39fec03b4a9269b5c62a7bf2ede575bce87dabb4..7d037060576960d622890cf7769be438f75b3391 100644 (file)
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -89,7 +89,7 @@
        sdhci0: sdhci@4f80000 {
                compatible = "ti,am654-sdhci-5.1";
                reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
-               power-domains = <&k3_pds 47>;
+               power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
                clock-names = "clk_ahb", "clk_xin";
                interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
@@ -108,7 +108,7 @@
                #size-cells = <0>;
                clock-names = "fck";
                clocks = <&k3_clks 110 1>;
-               power-domains = <&k3_pds 110>;
+               power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
        };
 
        main_i2c1: i2c@2010000 {
@@ -119,7 +119,7 @@
                #size-cells = <0>;
                clock-names = "fck";
                clocks = <&k3_clks 111 1>;
-               power-domains = <&k3_pds 111>;
+               power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
        };
 
        main_i2c2: i2c@2020000 {
@@ -130,7 +130,7 @@
                #size-cells = <0>;
                clock-names = "fck";
                clocks = <&k3_clks 112 1>;
-               power-domains = <&k3_pds 112>;
+               power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
        };
 
        main_i2c3: i2c@2030000 {
@@ -141,6 +141,6 @@
                #size-cells = <0>;
                clock-names = "fck";
                clocks = <&k3_clks 113 1>;
-               power-domains = <&k3_pds 113>;
+               power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
        };
 };

diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi
index 1fd027748e1fa525922f412fa866f1ed7c2f9dfb..c9bfd9b80ffda45a1258c9461e34966e64f01aed 100644 (file)
--- a/arch/arm/dts/k3-am65-mcu.dtsi
+++ b/arch/arm/dts/k3-am65-mcu.dtsi
@@ -24,6 +24,6 @@
                #size-cells = <0>;
                clock-names = "fck";
                clocks = <&k3_clks 114 1>;
-               power-domains = <&k3_pds 114>;
+               power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
        };
 };

diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 1f85006f557167570544c9bae3ae0eb0aa54401d..2676d6035b21577e093851450f5cb4e44cc3850e 100644 (file)
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -20,7 +20,7 @@
 
                k3_pds: power-controller {
                        compatible = "ti,sci-pm-domain";
-                       #power-domain-cells = <1>;
+                       #power-domain-cells = <2>;
                };
 
                k3_clks: clocks {
@@ -60,6 +60,6 @@
                #size-cells = <0>;
                clock-names = "fck";
                clocks = <&k3_clks 115 1>;
-               power-domains = <&k3_pds 115>;
+               power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
        };
 };

diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi
index 47271938b38378e051559040c7bbf61459c79bd5..a3abd146d104f929a01b5b10bfab94537b8083db 100644 (file)
--- a/arch/arm/dts/k3-am65.dtsi
+++ b/arch/arm/dts/k3-am65.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/k3.h>
+#include <dt-bindings/soc/ti,sci_pm_domain.h>
 
 / {
        model = "Texas Instruments K3 AM654 SoC";

diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 449b1ddd79281b66a9b407c053f57e25d73b7927..8a9d147ffa34ba897249c980634b78a972a8d150 100644 (file)
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -26,7 +26,7 @@
                reg = <0x0 0x4FA0000 0x0 0x1000>,
                      <0x0 0x4FB0000 0x0 0x400>;
                clocks = <&k3_clks 48 1>;
-               power-domains = <&k3_pds 48>;
+               power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
                max-frequency = <25000000>;
                ti,otap-del-sel = <0x2>;
                ti,trm-icp = <0x8>;

diff --git a/arch/arm/dts/k3-am654-ddr.dtsi b/arch/arm/dts/k3-am654-ddr.dtsi
index 964eb173eb3c64cb655a74fa24842180669541a6..622a3edb614b3c19174e765bdb4683b78ca06e58 100644 (file)
--- a/arch/arm/dts/k3-am654-ddr.dtsi
+++ b/arch/arm/dts/k3-am654-ddr.dtsi
@@ -11,8 +11,8 @@
                      <0x0 0x02988000 0x0 0x2000>;
                reg-names = "ss", "ctl", "phy";
                clocks = <&k3_clks 20 0>;
-               power-domains = <&k3_pds 20>,
-                               <&k3_pds 244>;
+               power-domains = <&k3_pds 20 TI_SCI_PD_SHARED>,
+                               <&k3_pds 244 TI_SCI_PD_SHARED>;
                assigned-clocks = <&k3_clks 20 1>;
                assigned-clock-rates = <DDR_PLL_FREQUENCY>;
                u-boot,dm-spl;

diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts
index 9d9b3d585283b0c54b133a15c0d7f3d4ddbd1400..7ed307f0d84c68af437d1367f3e36b9fdc08907b 100644 (file)
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -32,8 +32,8 @@
        a53_0: a53@0 {
                compatible = "ti,am654-rproc";
                reg = <0x0 0x00a90000 0x0 0x10>;
-               power-domains = <&k3_pds 61>,
-                               <&k3_pds 202>;
+               power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
+                               <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
                resets = <&k3_reset 202 0>;
                assigned-clocks = <&k3_clks 202 0>;
                assigned-clock-rates = <800000000>;
@@ -118,6 +118,10 @@
        status = "okay";
 };
 
+&main_uart0 {
+       power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
+};
+
 &wkup_pmx0 {
        u-boot,dm-spl;
        wkup_uart0_pins_default: wkup_uart0_pins_default {