]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: xilinx: Print fpga error value in hex
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Thu, 14 May 2020 13:49:36 +0000 (07:49 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 24 Jun 2020 11:11:08 +0000 (13:11 +0200)
Fpga returns error value when fails, error status should be
printed in hex format.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/fpga/versalpl.c
drivers/fpga/zynqmppl.c

index b96519e1a46f8c483b898e8c963cead502aa4754..8e2ef4f0da99e00d55894b2a78fa1116d0cd1aad 100644 (file)
@@ -45,7 +45,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
        ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
                                buf_hi, 0, ret_payload);
        if (ret)
-               puts("PL FPGA LOAD fail\n");
+               printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
 
        return ret;
 }
index 2ac4e38952125669133ca6823dfb4c49930bc82d..5b103cfeaf18565587a5f1bdcbd048f6d2be09de 100644 (file)
@@ -239,7 +239,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
                                        buf_hi, (u32)bsize, 0, ret_payload);
 
        if (ret)
-               puts("PL FPGA LOAD fail\n");
+               printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
 
        return ret;
 }