x86: Move link to use driver model for SCSI

As a demonstration of how to use SCSI with driver model, move link over
to use this. This patch needs more work, but illustrates the concept.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index 0f5e19042575fe4117735137ea026be729806c73..462b7c09ddab41ac1ec1013eeefd09a5b06ddf1f 100644 (file)
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <ahci.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <asm/io.h>
@@ -208,6 +209,20 @@ static void bd82x6x_sata_enable(struct udevice *dev)
        dm_pci_write_config16(dev, 0x90, map);
 }
 
+static int bd82x6x_sata_bind(struct udevice *dev)
+{
+       struct udevice *scsi_dev;
+       int ret;
+
+       if (gd->flags & GD_FLG_RELOC) {
+               ret = ahci_bind_scsi(dev, &scsi_dev);
+               if (ret)
+                       return ret;
+       }
+
+       return 0;
+}
+
 static int bd82x6x_sata_probe(struct udevice *dev)
 {
        struct udevice *pch;
@@ -219,8 +234,12 @@ static int bd82x6x_sata_probe(struct udevice *dev)
 
        if (!(gd->flags & GD_FLG_RELOC))
                bd82x6x_sata_enable(dev);
-       else
+       else {
                bd82x6x_sata_init(dev, pch);
+               ret = ahci_probe_scsi(dev);
+               if (ret)
+                       return ret;
+       }
 
        return 0;
 }
@@ -234,5 +253,6 @@ U_BOOT_DRIVER(ahci_ivybridge_drv) = {
        .name           = "ahci_ivybridge",
        .id             = UCLASS_AHCI,
        .of_match       = bd82x6x_ahci_ids,
+       .bind           = bd82x6x_sata_bind,
        .probe          = bd82x6x_sata_probe,
 };

diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index 8fb4712258c28c3cf43106d7f8bca0c53f1c26d0..557919c5d8bea7e685c48a4534c04d91364b858f 100644 (file)
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -58,6 +58,8 @@ CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BLK=y
 CONFIG_CPU=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_INTEL=y

diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 9c0f8602f9693b0a4a00098b64aa230546ce883d..3105fed469c1d155919d13fbf3165f7f1205c9e1 100644 (file)
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -41,6 +41,8 @@ CONFIG_OF_CONTROL=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BLK=y
 CONFIG_CPU=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_INTEL=y

diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index 51a934fe7ab55dabe0943937fde5dbe3dbe4c743..30d4019856e90c5796c5f2ea17fc1b2a04ee33d6 100644 (file)
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -37,6 +37,8 @@ CONFIG_OF_CONTROL=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BLK=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_LPC=y
 CONFIG_SPI_FLASH=y