am33xx: Correct NON_SECURE_SRAM_START/END

Prior to Sricharan's cleanup of the boot parameter saving code, we
did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a
problem that the address was pointing to the middle of our running SPL.
Correct to point to the base location of the download image area.
Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being
used.  As part of correcting these tests, make use of the fact that
we've always been placing our stack outside of the download image area
(which is fine, once the downloaded image is run, ROM is gone) so
correct the max size test to be the ROM defined top of the download area
to where we link/load at.

Signed-off-by: Tom Rini <trini@ti.com>
---
Changes in v2:
- Fix typo noted by Peter Korsgaard

diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h
index 7e3bb9c9940e84f9d9e5ea14c40824bfcea69a53..db151596439e9d68880c2b788447b81ccc5027e9 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -29,8 +29,8 @@
  * at 0x40304000(EMU base) so that our code works for both EMU and GP
  */
 #ifdef CONFIG_AM33XX
-#define NON_SECURE_SRAM_START  0x40304000
-#define NON_SECURE_SRAM_END    0x4030E000
+#define NON_SECURE_SRAM_START  0x402F0400
+#define NON_SECURE_SRAM_END    0x40310000
 #elif defined(CONFIG_TI814X)
 #define NON_SECURE_SRAM_START  0x40300000
 #define NON_SECURE_SRAM_END    0x40320000

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index f019134216a314fac5faf618be44be04223dcb66..b286ffc8d4fb2a729581964d184a1c4614747f5b 100644 (file)
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -305,8 +305,14 @@
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE           0x402F0400
-#define CONFIG_SPL_MAX_SIZE            (101 * 1024)
+/*
+ * Place the image at the start of the ROM defined image space and leave
+ * space for SRAM scratch entries (see arch/arm/include/omap_common.h).
+ * We limit our size to the ROM-defined downloaded image area, and use the
+ * rest of the space for stack.
+ */
+#define CONFIG_SPL_TEXT_BASE           0x402F0500
+#define CONFIG_SPL_MAX_SIZE            (0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000

diff --git a/include/configs/igep0033.h b/include/configs/igep0033.h
index 1912d7df3762c3761e32f8a97c2ec76fb5d95695..afbd54999748cc10ed5a47177907ce872f9b32e9 100644 (file)
--- a/include/configs/igep0033.h
+++ b/include/configs/igep0033.h
@@ -214,8 +214,14 @@
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE           0x402F0400
-#define CONFIG_SPL_MAX_SIZE            (101 * 1024)
+/*
+ * Place the image at the start of the ROM defined image space and leave
+ * space for SRAM scratch entries (see arch/arm/include/omap_common.h).
+ * We limit our size to the ROM-defined downloaded image area, and use the
+ * rest of the space for stack.
+ */
+#define CONFIG_SPL_TEXT_BASE           0x402F0500
+#define CONFIG_SPL_MAX_SIZE            (0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000

diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index 478f805b7c5ece05a45b4c72f1c179428348cae5..348030227db318aa05da1082692e075f5d9bcf1f 100644 (file)
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -204,8 +204,14 @@
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE           0x402F0400
-#define CONFIG_SPL_MAX_SIZE            (101 * 1024)
+/*
+ * Place the image at the start of the ROM defined image space and leave
+ * space for SRAM scratch entries (see arch/arm/include/omap_common.h).
+ * We limit our size to the ROM-defined downloaded image area, and use the
+ * rest of the space for stack.
+ */
+#define CONFIG_SPL_TEXT_BASE           0x402F0500
+#define CONFIG_SPL_MAX_SIZE            (0x4030C000 - CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000