fdt32_t *reg;
int addr_cells;
u64 val, core_id;
- size_t *boot_code_size = &(__secondary_boot_code_size);
u32 mask = cpu_pos_mask();
int off_prev = -1;
"cpu", 4);
}
- fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
- *boot_code_size);
+ fdt_add_mem_rsv(blob, (uintptr_t)secondary_boot_code_start,
+ secondary_boot_code_size);
#if CONFIG_IS_ENABLED(EFI_LOADER)
- efi_add_memory_map((uintptr_t)&secondary_boot_code, *boot_code_size,
- EFI_RESERVED_MEMORY_TYPE);
+ efi_add_memory_map((uintptr_t)secondary_boot_code_start,
+ secondary_boot_code_size, EFI_RESERVED_MEMORY_TYPE);
#endif
}
#endif
#include <linux/delay.h>
#include "cpu.h"
#include <asm/arch-fsl-layerscape/soc.h>
+#include <efi_loader.h>
DECLARE_GLOBAL_DATA_PTR;
void *get_spin_tbl_addr(void)
{
- return &__spin_table;
+ /* the spin table is at the beginning */
+ return secondary_boot_code_start;
}
void update_os_arch_secondary_cores(uint8_t os_arch)
#include <asm/system.h>
#include <asm/arch/mp.h>
- .align 3
- .global secondary_boot_addr
+.align 3
+.global secondary_boot_addr
secondary_boot_addr:
- .quad secondary_boot_func
+ .quad __secondary_boot_func
+
+.global secondary_boot_code_start
+secondary_boot_code_start:
+ .quad __secondary_boot_code_start
+.global secondary_boot_code_size
+secondary_boot_code_size:
+ .quad __secondary_boot_code_end - __secondary_boot_code_start
/* Using 64 bit alignment since the spin table is accessed as data */
.align 3
- .global secondary_boot_code
/* Secondary Boot Code starts here */
-secondary_boot_code:
- .global __spin_table
+__secondary_boot_code_start:
__spin_table:
.space CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE
.align 2
-ENTRY(secondary_boot_func)
+ENTRY(__secondary_boot_func)
/*
* MPIDR_EL1 Fields:
* MPIDR[1:0] = AFF0_CPUID <- Core ID (0,1)
ldr x5, =ES_TO_AARCH64
bl secondary_switch_to_el2
-ENDPROC(secondary_boot_func)
+ENDPROC(__secondary_boot_func)
ENTRY(secondary_switch_to_el2)
switch_el x6, 1f, 0f, 0f
.global __real_cntfrq
__real_cntfrq:
.quad COUNTER_FREQUENCY
- .globl __secondary_boot_code_size
- .type __secondary_boot_code_size, %object
/* Secondary Boot Code ends here */
-__secondary_boot_code_size:
- .quad .-secondary_boot_code
+__secondary_boot_code_end:
#define id_to_core(x) ((x & 3) | (x >> 6))
#ifndef __ASSEMBLY__
-extern u64 __spin_table[];
extern u64 __real_cntfrq;
-extern u64 *secondary_boot_code;
-extern size_t __secondary_boot_code_size;
+extern void *secondary_boot_addr;
+extern void *secondary_boot_code_start;
+extern size_t secondary_boot_code_size;
#ifdef CONFIG_MP
int fsl_layerscape_wake_seconday_cores(void);
#else