ARM: dts: k3: Add cfg register space for ringacc and udmap

R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
CFG, TCHAN CFG and RCHAN CFG address ranges.
Note that these registers are present within respective IPs but are
not populated in Linux DT nodes (as they are configured via TISCI APIs)
and hence are added to -u-boot.dtsi for now.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-6-vigneshr@ti.com

diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index b0602d1dad2bca3b5a80df1c57549ee1ff9a9071..2840258518272a3fd598611722a12e80c55bc72d 100644 (file)
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -35,11 +35,25 @@
                u-boot,dm-spl;
 
                ringacc@2b800000 {
+                       reg =   <0x0 0x2b800000 0x0 0x400000>,
+                               <0x0 0x2b000000 0x0 0x400000>,
+                               <0x0 0x28590000 0x0 0x100>,
+                               <0x0 0x2a500000 0x0 0x40000>,
+                               <0x0 0x28440000 0x0 0x40000>;
+                       reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
                        u-boot,dm-spl;
                        ti,dma-ring-reset-quirk;
                };
 
                dma-controller@285c0000 {
+                       reg =   <0x0 0x285c0000 0x0 0x100>,
+                               <0x0 0x284c0000 0x0 0x4000>,
+                               <0x0 0x2a800000 0x0 0x40000>,
+                               <0x0 0x284a0000 0x0 0x4000>,
+                               <0x0 0x2aa00000 0x0 0x40000>,
+                               <0x0 0x28400000 0x0 0x2000>;
+                       reg-names = "gcfg", "rchan", "rchanrt", "tchan",
+                                           "tchanrt", "rflow";
                        u-boot,dm-spl;
                };
        };

diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index c3aae65b395aca84c32b747ce67bfd4410cf52bc..41ce9fcb59b70434c10407d3b7e642313d91b6d8 100644 (file)
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -40,6 +40,32 @@
        chipid@43000014 {
                u-boot,dm-spl;
        };
+
+       mcu-navss{
+               u-boot,dm-spl;
+
+               ringacc@2b800000 {
+                       reg =   <0x0 0x2b800000 0x0 0x400000>,
+                               <0x0 0x2b000000 0x0 0x400000>,
+                               <0x0 0x28590000 0x0 0x100>,
+                               <0x0 0x2a500000 0x0 0x40000>,
+                               <0x0 0x28440000 0x0 0x40000>;
+                       reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+                       u-boot,dm-spl;
+               };
+
+               dma-controller@285c0000 {
+                       reg =   <0x0 0x285c0000 0x0 0x100>,
+                               <0x0 0x284c0000 0x0 0x4000>,
+                               <0x0 0x2a800000 0x0 0x40000>,
+                               <0x0 0x284a0000 0x0 0x4000>,
+                               <0x0 0x2aa00000 0x0 0x40000>,
+                               <0x0 0x28400000 0x0 0x2000>;
+                       reg-names = "gcfg", "rchan", "rchanrt", "tchan",
+                                           "tchanrt", "rflow";
+                       u-boot,dm-spl;
+               };
+       };
 };
 
 &secure_proxy_main {

diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 951331831e9f90ef823041b4922f1a6197f00aa6..974dae841616f0edfb36a7d339f42717d85121ac 100644 (file)
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -54,10 +54,24 @@
                u-boot,dm-spl;
 
                ringacc@2b800000 {
+                       reg =   <0x0 0x2b800000 0x0 0x400000>,
+                               <0x0 0x2b000000 0x0 0x400000>,
+                               <0x0 0x28590000 0x0 0x100>,
+                               <0x0 0x2a500000 0x0 0x40000>,
+                               <0x0 0x28440000 0x0 0x40000>;
+                       reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
                        u-boot,dm-spl;
                };
 
                dma-controller@285c0000 {
+                       reg =   <0x0 0x285c0000 0x0 0x100>,
+                               <0x0 0x284c0000 0x0 0x4000>,
+                               <0x0 0x2a800000 0x0 0x40000>,
+                               <0x0 0x284a0000 0x0 0x4000>,
+                               <0x0 0x2aa00000 0x0 0x40000>,
+                               <0x0 0x28400000 0x0 0x2000>;
+                       reg-names = "gcfg", "rchan", "rchanrt", "tchan",
+                                           "tchanrt", "rflow";
                        u-boot,dm-spl;
                };
        };