]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
armv8: fsl-layerscape: Update qspi clk cfg
authorPankit Garg <pankit.garg@nxp.com>
Wed, 29 May 2019 12:12:36 +0000 (12:12 +0000)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Wed, 19 Jun 2019 07:24:57 +0000 (12:54 +0530)
Update qspi clock configuration in TFABOOT in case
of all boot sources except qspi boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/soc.c

index af2d86bb9dd95220de839beaea231aa9c064cdd3..c53131f74af27bd0b6757a92aa6128d4abfade35 100644 (file)
@@ -599,6 +599,9 @@ void fsl_lsch2_early_init_f(void)
        struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
                                        CONFIG_SYS_CCI400_OFFSET);
        struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
+#if defined(CONFIG_FSL_QSPI) && defined(CONFIG_TFABOOT)
+       enum boot_src src;
+#endif
 
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
        enable_layerscape_ns_access();
@@ -608,8 +611,14 @@ void fsl_lsch2_early_init_f(void)
        init_early_memctl_regs();       /* tighten IFC timing */
 #endif
 
+#if defined(CONFIG_FSL_QSPI) && defined(CONFIG_TFABOOT)
+       src = get_boot_src();
+       if (src != BOOT_SOURCE_QSPI_NOR)
+               out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
+#else
 #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
        out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
+#endif
 #endif
        /* Make SEC reads and writes snoopable */
        setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |