Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
config TARGET_SBC8548
bool "Support sbc8548"
+ select ARCH_MPC8548
config TARGET_SOCRATES
bool "Support socrates"
config TARGET_MPC8548CDS
bool "Support MPC8548CDS"
+ select ARCH_MPC8548
config TARGET_MPC8555CDS
bool "Support MPC8555CDS"
config TARGET_XPEDITE520X
bool "Support xpedite520x"
+ select ARCH_MPC8548
config TARGET_XPEDITE537X
bool "Support xpedite537x"
endchoice
+config ARCH_MPC8548
+ bool
+
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
obj-$(CONFIG_PPC_C29X) += c29x_serdes.o
obj-$(CONFIG_MPC8536) += mpc8536_serdes.o
obj-$(CONFIG_MPC8544) += mpc8544_serdes.o
-obj-$(CONFIG_MPC8548) += mpc8548_serdes.o
+obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
obj-$(CONFIG_MPC8568) += mpc8568_serdes.o
obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
obj-$(CONFIG_MPC8572) += mpc8572_serdes.o
#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT)
struct law_entry law;
#endif
-#ifdef CONFIG_MPC8548
+#ifdef CONFIG_ARCH_MPC8548
ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
uint svr = get_svr();
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_A005125
-#elif defined(CONFIG_MPC8548)
+#elif defined(CONFIG_ARCH_MPC8548)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 10
#define CONFIG_SYS_FSL_DDRC_GEN2
u8 res[4096 - 1 * sizeof(struct fsl_i2c_base)];
} ccsr_i2c_t;
-#if defined(CONFIG_MPC8540) \
- || defined(CONFIG_MPC8541) \
- || defined(CONFIG_MPC8548) \
- || defined(CONFIG_MPC8555)
+#if defined(CONFIG_MPC8540) || \
+ defined(CONFIG_MPC8541) || \
+ defined(CONFIG_ARCH_MPC8548) || \
+ defined(CONFIG_MPC8555)
/* DUART Registers */
typedef struct ccsr_duart {
u8 res1[1280];
} else {
printf("PCI1: disabled\n");
}
-#elif defined CONFIG_MPC8548
+#elif defined CONFIG_ARCH_MPC8548
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* PCI1 not present on MPC8572 */
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
-#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */
#ifndef CONFIG_SYS_TEXT_BASE
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
-#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_SBC8548 1 /* SBC8548 board specific */
/*
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
-#define CONFIG_MPC8548 1
#define CONFIG_XPEDITE5200 1
#define CONFIG_SYS_BOARD_NAME "XPedite5200"
#define CONFIG_SYS_FORM_PMC_XMC 1
CONFIG_MPC8541CDS
CONFIG_MPC8544
CONFIG_MPC8544DS
-CONFIG_MPC8548
CONFIG_MPC8548CDS
CONFIG_MPC855
CONFIG_MPC8555