ARM: dts: sun8i: Update R40/V40 dts(i) files from Linux-v4.18-rc3

Update all R40/V40 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:

R40:
commit c36fd5a48bd20820855e3e91a89297eeaa31836e
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Wed May 2 00:12:25 2018 +0800

    ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller

V40:
commit c5f0bb472795170ab5c33be12e29ce7465fb31ed
Author: Icenowy Zheng <icenowy@aosc.io>
Date:   Fri Apr 6 22:03:44 2018 +0800

    ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # BPI-M2-Ultra, BPI-M2-Berry

diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index 28c915830280aa931df1a67d8952008e3c47a93c..25fb048c7df2389a5d9ded7f44886efafb36b5d0 100644 (file)
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,6 +44,8 @@
 /dts-v1/;
 #include "sun8i-r40.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+
 / {
        model = "Banana Pi BPI-M2-Ultra";
        compatible = "sinovoip,bpi-m2-ultra", "allwinner,sun8i-r40";
@@ -55,17 +58,47 @@
        chosen {
                stdout-path = "serial0:115200n8";
        };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pwr-led {
+                       label = "bananapi:red:pwr";
+                       gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+               };
+
+               user-led-green {
+                       label = "bananapi:green:user";
+                       gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
+               };
+
+               user-led-blue {
+                       label = "bananapi:blue:user";
+                       gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
+               enable-active-high;
+       };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
+       };
 };
 
-&i2c0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c0_pins>;
+&ehci1 {
        status = "okay";
 };
 
-&uart0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pb_pins>;
+&ehci2 {
        status = "okay";
 };
 
@@ -74,6 +107,7 @@
        pinctrl-0 = <&gmac_rgmii_pins>;
        phy-handle = <&phy1>;
        phy-mode = "rgmii";
+       phy-supply = <&reg_dc1sw>;
        status = "okay";
 };
 
@@ -83,3 +117,123 @@
                reg = <1>;
        };
 };
+
+&i2c0 {
+       status = "okay";
+
+       axp22x: pmic@34 {
+               compatible = "x-powers,axp221";
+               reg = <0x34>;
+               interrupt-parent = <&nmi_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
+#include "axp22x.dtsi"
+
+&mmc0 {
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <4>;
+       cd-gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */
+       cd-inverted;
+       status = "okay";
+};
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pg_pins>;
+       vmmc-supply = <&reg_dldo2>;
+       vqmmc-supply = <&reg_dldo1>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+};
+
+&mmc2 {
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_dcdc1>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <2500000>;
+       regulator-max-microvolt = <2500000>;
+       regulator-name = "vcc-pa";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <2700000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "avcc";
+};
+
+&reg_dc1sw {
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-gmac-phy";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-3v0";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1000000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+       regulator-always-on;
+       regulator-min-microvolt = <1000000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1500000>;
+       regulator-max-microvolt = <1500000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dldo1 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi-io";
+};
+
+&reg_dldo2 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pb_pins>;
+       status = "okay";
+};
+
+&usbphy {
+       usb1_vbus-supply = <&reg_vcc5v0>;
+       usb2_vbus-supply = <&reg_vcc5v0>;
+       status = "okay";
+};

diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 2cdfb54282ca5b8ff0f7da329f5ef7b664155074..bd97ca3dc2fa0ca264144af345870cea784deac6 100644 (file)
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -1,7 +1,6 @@
 /*
- * Copyright 2016 Chen-Yu Tsai
- *
- * Chen-Yu Tsai <wens@csie.org>
+ * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
+ * Copyright 2017 Icenowy Zheng <icenowy@aosc.io>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -51,24 +50,19 @@
        #size-cells = <1>;
        interrupt-parent = <&gic>;
 
-       aliases {
-       };
-
-       chosen {
-       };
-
        clocks {
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
 
-               osc24M: osc24M_clk {
+               osc24M: osc24M {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <24000000>;
+                       clock-output-names = "osc24M";
                };
 
-               osc32k: osc32k_clk {
+               osc32k: osc32k {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <32768>;
@@ -80,7 +74,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu0: cpu@0 {
+               cpu@0 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <0>;
@@ -105,11 +99,6 @@
                };
        };
 
-       memory@40000000 {
-               device_type = "memory";
-               reg = <0x40000000 0x80000000>;
-       };
-
        soc {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -140,6 +129,122 @@
                        #size-cells = <0>;
                };
 
+               mmc1: mmc@1c10000 {
+                       compatible = "allwinner,sun8i-r40-mmc",
+                                    "allwinner,sun50i-a64-mmc";
+                       reg = <0x01c10000 0x1000>;
+                       clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+                       clock-names = "ahb", "mmc";
+                       resets = <&ccu RST_BUS_MMC1>;
+                       reset-names = "ahb";
+                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               mmc2: mmc@1c11000 {
+                       compatible = "allwinner,sun8i-r40-emmc",
+                                    "allwinner,sun50i-a64-emmc";
+                       reg = <0x01c11000 0x1000>;
+                       clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+                       clock-names = "ahb", "mmc";
+                       resets = <&ccu RST_BUS_MMC2>;
+                       reset-names = "ahb";
+                       pinctrl-0 = <&mmc2_pins>;
+                       pinctrl-names = "default";
+                       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               mmc3: mmc@1c12000 {
+                       compatible = "allwinner,sun8i-r40-mmc",
+                                    "allwinner,sun50i-a64-mmc";
+                       reg = <0x01c12000 0x1000>;
+                       clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
+                       clock-names = "ahb", "mmc";
+                       resets = <&ccu RST_BUS_MMC3>;
+                       reset-names = "ahb";
+                       interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               usbphy: phy@1c13400 {
+                       compatible = "allwinner,sun8i-r40-usb-phy";
+                       reg = <0x01c13400 0x14>,
+                             <0x01c14800 0x4>,
+                             <0x01c19800 0x4>,
+                             <0x01c1c800 0x4>;
+                       reg-names = "phy_ctrl",
+                                   "pmu0",
+                                   "pmu1",
+                                   "pmu2";
+                       clocks = <&ccu CLK_USB_PHY0>,
+                                <&ccu CLK_USB_PHY1>,
+                                <&ccu CLK_USB_PHY2>;
+                       clock-names = "usb0_phy",
+                                     "usb1_phy",
+                                     "usb2_phy";
+                       resets = <&ccu RST_USB_PHY0>,
+                                <&ccu RST_USB_PHY1>,
+                                <&ccu RST_USB_PHY2>;
+                       reset-names = "usb0_reset",
+                                     "usb1_reset",
+                                     "usb2_reset";
+                       status = "disabled";
+                       #phy-cells = <1>;
+               };
+
+               ehci1: usb@1c19000 {
+                       compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
+                       reg = <0x01c19000 0x100>;
+                       interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_EHCI1>;
+                       resets = <&ccu RST_BUS_EHCI1>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci1: usb@1c19400 {
+                       compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
+                       reg = <0x01c19400 0x100>;
+                       interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_OHCI1>,
+                                <&ccu CLK_USB_OHCI1>;
+                       resets = <&ccu RST_BUS_OHCI1>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ehci2: usb@1c1c000 {
+                       compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
+                       reg = <0x01c1c000 0x100>;
+                       interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_EHCI2>;
+                       resets = <&ccu RST_BUS_EHCI2>;
+                       phys = <&usbphy 2>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci2: usb@1c1c400 {
+                       compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
+                       reg = <0x01c1c400 0x100>;
+                       interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_OHCI2>,
+                                <&ccu CLK_USB_OHCI2>;
+                       resets = <&ccu RST_BUS_OHCI2>;
+                       phys = <&usbphy 2>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun8i-r40-ccu";
                        reg = <0x01c20000 0x400>;
@@ -153,8 +258,7 @@
                        compatible = "allwinner,sun8i-r40-pinctrl";
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-                       /* apb should be replaced once CCU is implemented */
-                       clocks = <&osc24M>, <&osc24M>, <&osc32k>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
@@ -174,10 +278,9 @@
                                drive-strength = <40>;
                        };
 
-                       i2c0_pins: i2c0_pins {
+                       i2c0_pins: i2c0-pins {
                                pins = "PB0", "PB1";
                                function = "i2c0";
-                               bias-pull-up;
                        };
 
                        mmc0_pins: mmc0-pins {
@@ -188,20 +291,119 @@
                                bias-pull-up;
                        };
 
-                       uart0_pb_pins: uart0_pb_pins {
+                       mmc1_pg_pins: mmc1-pg-pins {
+                               pins = "PG0", "PG1", "PG2",
+                                      "PG3", "PG4", "PG5";
+                               function = "mmc1";
+                               drive-strength = <30>;
+                               bias-pull-up;
+                       };
+
+                       mmc2_pins: mmc2-pins {
+                               pins = "PC5", "PC6", "PC7", "PC8", "PC9",
+                                      "PC10", "PC11", "PC12", "PC13", "PC14",
+                                      "PC15", "PC24";
+                               function = "mmc2";
+                               drive-strength = <30>;
+                               bias-pull-up;
+                       };
+
+                       uart0_pb_pins: uart0-pb-pins {
                                pins = "PB22", "PB23";
                                function = "uart0";
-                               bias-pull-up;
                        };
                };
 
+               wdt: watchdog@1c20c90 {
+                       compatible = "allwinner,sun4i-a10-wdt";
+                       reg = <0x01c20c90 0x10>;
+               };
+
                uart0: serial@1c28000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28000 0x400>;
                        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&osc24M>;
+                       clocks = <&ccu CLK_BUS_UART0>;
+                       resets = <&ccu RST_BUS_UART0>;
+                       status = "disabled";
+               };
+
+               uart1: serial@1c28400 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x01c28400 0x400>;
+                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       clocks = <&ccu CLK_BUS_UART1>;
+                       resets = <&ccu RST_BUS_UART1>;
+                       status = "disabled";
+               };
+
+               uart2: serial@1c28800 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x01c28800 0x400>;
+                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       clocks = <&ccu CLK_BUS_UART2>;
+                       resets = <&ccu RST_BUS_UART2>;
+                       status = "disabled";
+               };
+
+               uart3: serial@1c28c00 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x01c28c00 0x400>;
+                       interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       clocks = <&ccu CLK_BUS_UART3>;
+                       resets = <&ccu RST_BUS_UART3>;
+                       status = "disabled";
+               };
+
+               uart4: serial@1c29000 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x01c29000 0x400>;
+                       interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       clocks = <&ccu CLK_BUS_UART4>;
+                       resets = <&ccu RST_BUS_UART4>;
+                       status = "disabled";
+               };
+
+               uart5: serial@1c29400 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x01c29400 0x400>;
+                       interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       clocks = <&ccu CLK_BUS_UART5>;
+                       resets = <&ccu RST_BUS_UART5>;
+                       status = "disabled";
+               };
+
+               uart6: serial@1c29800 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x01c29800 0x400>;
+                       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       clocks = <&ccu CLK_BUS_UART6>;
+                       resets = <&ccu RST_BUS_UART6>;
+                       status = "disabled";
+               };
+
+               uart7: serial@1c29c00 {
+                       compatible = "snps,dw-apb-uart";
+                       reg = <0x01c29c00 0x400>;
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       clocks = <&ccu CLK_BUS_UART7>;
+                       resets = <&ccu RST_BUS_UART7>;
                        status = "disabled";
                };
 
@@ -209,7 +411,54 @@
                        compatible = "allwinner,sun6i-a31-i2c";
                        reg = <0x01c2ac00 0x400>;
                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&osc24M>;
+                       clocks = <&ccu CLK_BUS_I2C0>;
+                       resets = <&ccu RST_BUS_I2C0>;
+                       pinctrl-0 = <&i2c0_pins>;
+                       pinctrl-names = "default";
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               i2c1: i2c@1c2b000 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2b000 0x400>;
+                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2C1>;
+                       resets = <&ccu RST_BUS_I2C1>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               i2c2: i2c@1c2b400 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2b400 0x400>;
+                       interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2C2>;
+                       resets = <&ccu RST_BUS_I2C2>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               i2c3: i2c@1c2b800 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2b800 0x400>;
+                       interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2C3>;
+                       resets = <&ccu RST_BUS_I2C3>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               i2c4: i2c@1c2c000 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2c000 0x400>;
+                       interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2C4>;
+                       resets = <&ccu RST_BUS_I2C4>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -237,7 +486,7 @@
                };
 
                gic: interrupt-controller@1c81000 {
-                       compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+                       compatible = "arm,gic-400";
                        reg = <0x01c81000 0x1000>,
                              <0x01c82000 0x1000>,
                              <0x01c84000 0x2000>,
@@ -254,7 +503,5 @@
                             <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
                             <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
-               clock-frequency = <24000000>;
-               arm,cpu-registers-not-fw-configured;
        };
 };

diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
index 193d9b29ecd21e95f0b67b2e407544fe6aee573b..35859d8f3267fd2a1d6fa7e716e97094895f3530 100644 (file)
--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -56,6 +56,40 @@
        chosen {
                stdout-path = "serial0:115200n8";
        };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pwr-led {
+                       label = "bananapi:red:pwr";
+                       gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+               };
+
+               user-led {
+                       label = "bananapi:green:user";
+                       gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
+               enable-active-high;
+       };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
+       };
+};
+
+&ehci1 {
+       /* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
+       status = "okay";
 };
 
 &i2c0 {
@@ -125,8 +159,24 @@
        status = "okay";
 };
 
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pg_pins>;
+       vmmc-supply = <&reg_dldo2>;
+       vqmmc-supply = <&reg_dldo1>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pb_pins>;
        status = "okay";
 };
+
+&usbphy {
+       usb1_vbus-supply = <&reg_vcc5v0>;
+       status = "okay";
+};