rockchip: clk: rk3399: allow requests for all UART clocks

This patch adds the rate for UART1 and UART3 the same way
as already implemented for UART0 and UART2.

This is required for boards, which have their console output
on these UARTs.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 93a652e5ff4d0c9fe48425c4290dc6ffcfb01370..aa6a8ad1c9c88c8998b7009ce3dddafa695dc61a 100644 (file)
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -912,7 +912,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
                rate = rk3399_spi_get_clk(priv->cru, clk->id);
                break;
        case SCLK_UART0:
+       case SCLK_UART1:
        case SCLK_UART2:
+       case SCLK_UART3:
                return 24000000;
                break;
        case PCLK_HDMI_CTRL: