]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: include: sunxi: Remove duplicate newlines
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 13 Jul 2024 13:19:03 +0000 (15:19 +0200)
committerTom Rini <trini@konsulko.com>
Mon, 15 Jul 2024 18:12:16 +0000 (12:12 -0600)
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h
arch/arm/include/asm/arch-sunxi/clock_sun9i.h
arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h
arch/arm/include/asm/arch-sunxi/dram_sun9i.h

index 14df3cc8f46b99b180e7378e8213e795f98ecbe2..35ca0491ac96ec9a0bd1038b41e69efe8d4e3836 100644 (file)
@@ -262,7 +262,6 @@ struct sunxi_ccm_reg {
 #define CCM_DRAM_GATE_OFFSET_DE_BE0    26
 #define CCM_DRAM_GATE_OFFSET_DE_BE1    27
 
-
 #define MBUS_CLK_DEFAULT               0x81000002 /* PLL6 / 2 */
 
 #define MBUS_CLK_GATE                  (0x1 << 31)
@@ -295,7 +294,6 @@ struct sunxi_ccm_reg {
 #define APB2_RESET_TWI_SHIFT           (0)
 #define APB2_RESET_TWI_MASK            (0xf << APB2_RESET_TWI_SHIFT)
 
-
 #ifndef __ASSEMBLY__
 void clock_set_pll1(unsigned int hz);
 void clock_set_pll5(unsigned int clk);
index 0264bfe1c50a2392240a37bf763a65b49dc2d8ff..006f7761fc65e39c1e2074f775e18b11c4927dfa 100644 (file)
@@ -217,7 +217,6 @@ struct sunxi_ccm_reg {
 #define APB1_RESET_TWI_SHIFT           0
 #define APB1_RESET_TWI_MASK            (0xf << APB1_RESET_TWI_SHIFT)
 
-
 #ifndef __ASSEMBLY__
 void clock_set_pll1(unsigned int clk);
 void clock_set_pll6(unsigned int clk);
index be02655cdd52074f7a29818b6f83da38d1889393..f0caecc807dd149a3e482b14192963637432b508 100644 (file)
@@ -323,7 +323,6 @@ struct dram_para {
        const u8 dx_write_delays[NR_OF_BYTE_LANES][WR_LINES_PER_BYTE_LANE];
 };
 
-
 static inline int ns_to_t(int nanoseconds)
 {
        const unsigned int ctrl_freq = CONFIG_DRAM_CLK / 2;
index 2a8799635473aa77d2d30c56ec851b7b5fc9ce7e..28b6560ff5b0ea5647968280f54ee285a292bd54 100644 (file)
@@ -146,7 +146,6 @@ struct sunxi_mctl_ctl_reg {
        u32 perfwr1;            /* 0x1d8 */
 };
 
-
 #define ZQnPR(x)       (SUNXI_DRAM_CTL0_BASE + 0x00000144 + 0x10 * x)
 #define ZQnDR(x)       (SUNXI_DRAM_CTL0_BASE + 0x00000148 + 0x10 * x)
 #define ZQnSR(x)       (SUNXI_DRAM_CTL0_BASE + 0x0000014c + 0x10 * x)
index 41df5fe5b6f904d3d35446f14c01049b23377ea6..a77daecb107d8da8adf24bd653e6f8d69f110287 100644 (file)
@@ -40,7 +40,6 @@ struct sunxi_mctl_com_reg {
        u32 mdfstcr;            /* 0x14c */
 };
 
-
 struct sunxi_mctl_ctl_reg {
        u32 mstr;               /* 0x00 master register */
        u32 stat;               /* 0x04 operating mode status register */
@@ -92,7 +91,6 @@ struct sunxi_mctl_ctl_reg {
        u32 perfwr1;            /* 0x26c write CAM register 1 */
 };
 
-
 struct sunxi_mctl_phy_reg {
        u8 res0[0x04];          /* 0x00 revision id ??? */
        u32 pir;                /* 0x04 PHY initialisation register */