]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mmc: Migrate MMC_SUPPORTS_TUNING to Kconfig
authorTom Rini <trini@konsulko.com>
Thu, 2 May 2024 01:30:18 +0000 (19:30 -0600)
committerTom Rini <trini@konsulko.com>
Tue, 7 May 2024 14:00:40 +0000 (08:00 -0600)
The constraints on the MMC_SUPPORTS_TUNING symbol can easily be
expressed in Kconfig (with the addition of SPL_MMC_SUPPORTS_TUNING).
Furthermore, in order to remove <common.h> from the MMC subsystem, the
way this symbol is used today needs to be changed in order to continue
functioning.

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
17 files changed:
arch/arm/mach-mediatek/Kconfig
arch/mips/mach-mtmips/Kconfig
drivers/mmc/Kconfig
drivers/mmc/am654_sdhci.c
drivers/mmc/fsl_esdhc.c
drivers/mmc/fsl_esdhc_imx.c
drivers/mmc/mmc-uclass.c
drivers/mmc/mmc.c
drivers/mmc/mtk-sd.c
drivers/mmc/octeontx_hsmmc.c
drivers/mmc/omap_hsmmc.c
drivers/mmc/sdhci-cadence.c
drivers/mmc/sdhci.c
include/configs/mt7621.h
include/configs/mt7623.h
include/configs/octeontx2_common.h
include/mmc.h

index 82018bd9d3e3fec0a7e88707680f8f62a7c538af..ff1fdee5c8da2bc81916da02bc3b84974a7042ff 100644 (file)
@@ -23,6 +23,7 @@ config TARGET_MT7622
 config TARGET_MT7623
        bool "MediaTek MT7623 SoC"
        select CPU_V7A
+       select MMC_SUPPORTS_TUNING
        help
          The MediaTek MT7623 is a ARM-based SoC with a quad-core Cortex-A7
          including NEON and GPU, Mali-450 graphics, several DDR3 options,
index 15b2792e619b01c09ffc6aa12a7c89d30a033c97..3fcd0b8465b454f4a3ed4602b232458dfe581360 100644 (file)
@@ -80,6 +80,7 @@ config SOC_MT7621
        bool "MT7621"
        select MIPS_CM
        select MIPS_L2_CACHE
+       select MMC_SUPPORTS_TUNING
        select SYS_CACHE_SHIFT_5
        select SYS_MIPS_CACHE_INIT_RAM_LOAD
        select PINCTRL_MT7621
index 549634891a36d9a3a56bf916efb283cdf91284d1..d0944793c92d3fd7d3be063ab754d6fb3ec3b232 100644 (file)
@@ -147,9 +147,16 @@ config SPL_MMC_IO_VOLTAGE
          support. For eMMC this not mandatory, but not enabling this option may
          prevent the driver of using the faster modes.
 
+config MMC_SUPPORTS_TUNING
+       bool
+
+config SPL_MMC_SUPPORTS_TUNING
+       bool
+
 config MMC_UHS_SUPPORT
        bool "enable UHS support"
        depends on MMC_IO_VOLTAGE
+       select MMC_SUPPORTS_TUNING
        help
          The Ultra High Speed (UHS) bus is available on some SDHC and SDXC
          cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus
@@ -158,6 +165,7 @@ config MMC_UHS_SUPPORT
 config SPL_MMC_UHS_SUPPORT
        bool "enable UHS support in SPL"
        depends on SPL_MMC_IO_VOLTAGE
+       select SPL_MMC_SUPPORTS_TUNING
        help
          The Ultra High Speed (UHS) bus is available on some SDHC and SDXC
          cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus
@@ -193,6 +201,7 @@ config SPL_MMC_HS400_SUPPORT
 
 config MMC_HS200_SUPPORT
        bool "enable HS200 support"
+       select MMC_SUPPORTS_TUNING
        help
          The HS200 mode is support by some eMMC. The bus frequency is up to
          200MHz. This mode requires tuning the IO.
@@ -200,6 +209,7 @@ config MMC_HS200_SUPPORT
 config SPL_MMC_HS200_SUPPORT
        bool "enable HS200 support in SPL"
        depends on SPL_MMC
+       select SPL_MMC_SUPPORTS_TUNING
        help
          The HS200 mode is support by some eMMC. The bus frequency is up to
          200MHz. This mode requires tuning the IO.
@@ -347,6 +357,7 @@ config MMC_OCTEONTX
        bool "Marvell Octeon Multimedia Card Interface support"
        depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2)
        depends on DM_MMC
+       select MMC_SUPPORTS_TUNING if ARCH_OCTEONTX2
        help
          This selects the Octeon Multimedia card Interface.
          If you have an OcteonTX/TX2 or MIPS Octeon board with a
index fadab7d40bb795232f86586fe4352aa539bdc754..ffb461c2f6c1fee0c666842f5b5d8d56189fbd00 100644 (file)
@@ -397,7 +397,7 @@ static void am654_sdhci_write_b(struct sdhci_host *host, u8 val, int reg)
 
        writeb(val, host->ioaddr + reg);
 }
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 #define ITAPDLY_LENGTH 32
 #define ITAPDLY_LAST_INDEX (ITAPDLY_LENGTH - 1)
 
@@ -500,7 +500,7 @@ static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode)
 }
 #endif
 const struct sdhci_ops am654_sdhci_ops = {
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .platform_execute_tuning = am654_sdhci_execute_tuning,
 #endif
        .deferred_probe         = am654_sdhci_deferred_probe,
@@ -560,7 +560,7 @@ static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
 }
 
 const struct sdhci_ops j721e_4bit_sdhci_ops = {
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .platform_execute_tuning = am654_sdhci_execute_tuning,
 #endif
        .deferred_probe         = am654_sdhci_deferred_probe,
index 595d88bd56253f256a8bb1022f7feac6584e8ce7..5ac1c6a0e9e167cd88f6be21400ac6c47d34de17 100644 (file)
@@ -1102,7 +1102,7 @@ static int fsl_esdhc_reinit(struct udevice *dev)
        return esdhc_init_common(priv, &plat->mmc);
 }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode)
 {
        struct fsl_esdhc_plat *plat = dev_get_plat(dev);
@@ -1175,7 +1175,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
        .get_cd         = fsl_esdhc_get_cd,
        .send_cmd       = fsl_esdhc_send_cmd,
        .set_ios        = fsl_esdhc_set_ios,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .execute_tuning = fsl_esdhc_execute_tuning,
 #endif
        .reinit = fsl_esdhc_reinit,
index b74c014002058f84d10823f87ae1049c96ecc06e..8b2ef9391f3e42096668ab0c2f99b079af4dc49a 100644 (file)
@@ -635,7 +635,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
        priv->clock = clock;
 }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static int esdhc_change_pinstate(struct udevice *dev)
 {
        struct fsl_esdhc_priv *priv = dev_get_priv(dev);
@@ -913,7 +913,7 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
        int ret __maybe_unused;
        u32 clock;
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        /*
         * call esdhc_set_timing() before update the clock rate,
         * This is because current we support DDR and SDR mode,
@@ -951,7 +951,7 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
                        esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
        }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        /*
         * For HS400/HS400ES mode, make sure set the strobe dll in the
         * target clock rate. So call esdhc_set_strobe_dll() after the
@@ -1618,7 +1618,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
        .get_cd         = fsl_esdhc_get_cd,
        .send_cmd       = fsl_esdhc_send_cmd,
        .set_ios        = fsl_esdhc_set_ios,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .execute_tuning = fsl_esdhc_execute_tuning,
 #endif
 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
index 24170c59ecc1b3aeb3e92d022ad051f6f2dbaf18..0685b86af46494048d448ef19ee22983f364aee1 100644 (file)
@@ -112,7 +112,7 @@ int mmc_getcd(struct mmc *mmc)
        return dm_mmc_get_cd(mmc->dev);
 }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static int dm_mmc_execute_tuning(struct udevice *dev, uint opcode)
 {
        struct dm_mmc_ops *ops = mmc_get_ops(dev);
index 7b068c71ff37871c309729faa573629b73635898..4543d94c7205776b1e5febe195ef813dd133fe01 100644 (file)
@@ -329,7 +329,7 @@ int mmc_set_blocklen(struct mmc *mmc, int len)
                                   MMC_QUIRK_RETRY_SET_BLOCKLEN, 4);
 }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static const u8 tuning_blk_pattern_4bit[] = {
        0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
        0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
@@ -1621,7 +1621,7 @@ static inline int bus_width(uint cap)
 }
 
 #if !CONFIG_IS_ENABLED(DM_MMC)
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
 {
        return -ENOTSUPP;
@@ -1702,7 +1702,7 @@ void mmc_dump_capabilities(const char *text, uint caps)
 struct mode_width_tuning {
        enum bus_mode mode;
        uint widths;
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        uint tuning;
 #endif
 };
@@ -1743,7 +1743,7 @@ static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
 #if !CONFIG_IS_ENABLED(MMC_TINY)
 static const struct mode_width_tuning sd_modes_by_pref[] = {
 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        {
                .mode = UHS_SDR104,
                .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
@@ -1846,7 +1846,7 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
                                mmc_set_clock(mmc, mmc->tran_speed,
                                                MMC_CLK_ENABLE);
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
                                /* execute tuning if needed */
                                if (mwt->tuning && !mmc_host_is_spi(mmc)) {
                                        err = mmc_execute_tuning(mmc,
@@ -2224,7 +2224,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
                                mmc_select_mode(mmc, mwt->mode);
                                mmc_set_clock(mmc, mmc->tran_speed,
                                              MMC_CLK_ENABLE);
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 
                                /* execute tuning if needed */
                                if (mwt->tuning) {
index 296aaee73318c4ef19cd42b88aaeb491aba64479..4bd66ecf93adbce914fb9e8032b871fdc878bcd4 100644 (file)
@@ -1011,7 +1011,7 @@ static int msdc_ops_get_wp(struct udevice *dev)
 #endif
 }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static u32 test_delay_bit(u32 delay, u32 bit)
 {
        bit %= PAD_DELAY_MAX;
@@ -1760,7 +1760,7 @@ static const struct dm_mmc_ops msdc_ops = {
        .set_ios = msdc_ops_set_ios,
        .get_cd = msdc_ops_get_cd,
        .get_wp = msdc_ops_get_wp,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .execute_tuning = msdc_execute_tuning,
 #endif
        .wait_dat0 = msdc_ops_wait_dat0,
index 7f9c4f4d36d4aa727baf7fc986e682801eb59f7f..3b5e122173254cf5f373cb3eb53d47893cb0cac1 100644 (file)
@@ -794,7 +794,7 @@ octeontx_mmc_get_cr_mods(struct mmc *mmc, const struct mmc_cmd *cmd,
        u8 desired_ctype = 0;
 
        if (IS_MMC(mmc)) {
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
                if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) {
                        if (cmd->resp_type == MMC_RSP_R1)
                                cr.rtype_xor = 1;
@@ -1631,7 +1631,7 @@ static int octeontx_mmc_dev_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
        return octeontx_mmc_send_cmd(dev_to_mmc(dev), cmd, data);
 }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static int octeontx_mmc_test_cmd(struct mmc *mmc, u32 opcode, int *statp)
 {
        struct mmc_cmd cmd;
@@ -2421,12 +2421,12 @@ static int octeontx_mmc_execute_tuning(struct udevice *dev, u32 opcode)
 
        return 0;
 }
-#else /* MMC_SUPPORTS_TUNING */
+#else /* CONFIG_MMC_SUPPORTS_TUNING */
 static void octeontx_mmc_set_emm_timing(struct mmc *mmc,
                                        union mio_emm_timing emm_timing)
 {
 }
-#endif /* MMC_SUPPORTS_TUNING */
+#endif /* CONFIG_MMC_SUPPORTS_TUNING */
 
 /**
  * Calculate the clock period with rounding up
@@ -2573,7 +2573,7 @@ static int octeontx_mmc_set_ios(struct udevice *dev)
 
        err = octeontx_mmc_configure_delay(mmc);
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        if (!err && mmc->selected_mode == MMC_HS_400 && !slot->hs400_tuned) {
                debug("%s: Tuning HS400 mode\n", __func__);
                err = octeontx_tune_hs400(mmc);
@@ -3776,7 +3776,7 @@ static const struct dm_mmc_ops octeontx_hsmmc_ops = {
        .set_ios = octeontx_mmc_set_ios,
        .get_cd = octeontx_mmc_get_cd,
        .get_wp = octeontx_mmc_get_wp,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .execute_tuning = octeontx_mmc_execute_tuning,
 #endif
 };
index 99f21b2c546ae4d827c5d49247537056e5a39cb9..118d9cd16fdbe876635e08a8938bd8df7f0ad78d 100644 (file)
@@ -577,7 +577,7 @@ static uint32_t omap_hsmmc_set_capabilities(struct mmc *mmc)
        return val;
 }
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static void omap_hsmmc_disable_tuning(struct mmc *mmc)
 {
        struct hsmmc *mmc_base;
@@ -1518,7 +1518,7 @@ static const struct dm_mmc_ops omap_hsmmc_ops = {
        .get_cd         = omap_hsmmc_getcd,
        .get_wp         = omap_hsmmc_getwp,
 #endif
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .execute_tuning = omap_hsmmc_execute_tuning,
 #endif
        .wait_dat0      = omap_hsmmc_wait_dat0,
index c0a9f60b1496fe6a9af6502c087920cc839d444c..0570dbca00d7710a58a63c791b329e4df2240f37 100644 (file)
@@ -274,7 +274,7 @@ static int sdhci_cdns_probe(struct udevice *dev)
        host->ops = &sdhci_cdns_ops;
        host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD;
        sdhci_cdns_mmc_ops = sdhci_ops;
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        sdhci_cdns_mmc_ops.execute_tuning = sdhci_cdns_execute_tuning;
 #endif
 
index af654ea8d13c26d62abc05d860802998de4f8ba3..d06f2c02bb7b10eb09260c60fa1d330b91c6e493 100644 (file)
@@ -351,7 +351,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
                return -ECOMM;
 }
 
-#if defined(CONFIG_DM_MMC) && defined(MMC_SUPPORTS_TUNING)
+#if defined(CONFIG_DM_MMC) && CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
 static int sdhci_execute_tuning(struct udevice *dev, uint opcode)
 {
        int err;
@@ -848,7 +848,7 @@ const struct dm_mmc_ops sdhci_ops = {
        .set_ios        = sdhci_set_ios,
        .get_cd         = sdhci_get_cd,
        .deferred_probe = sdhci_deferred_probe,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        .execute_tuning = sdhci_execute_tuning,
 #endif
        .wait_dat0      = sdhci_wait_dat0,
index bf2bc2d45c09994409bd6fe52b236d38c76d978d..e6dba7071950c769e195a5d7a7a2581b01efcf35 100644 (file)
@@ -14,9 +14,6 @@
 
 #define CFG_SYS_INIT_SP_OFFSET         0x800000
 
-/* MMC */
-#define MMC_SUPPORTS_TUNING
-
 /* Serial SPL */
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
 #define CFG_SYS_NS16550_CLK            50000000
index fca234a1dc71a85f4982a49db4f1ab53e30b9ed7..6f42cd32d80fbfc4e8923826d448da40e7f49b5c 100644 (file)
@@ -11,9 +11,6 @@
 
 #include <linux/sizes.h>
 
-/* MMC */
-#define MMC_SUPPORTS_TUNING
-
 /* DRAM */
 #define CFG_SYS_SDRAM_BASE             0x80000000
 
index c4db38562d831ddcd7a5328b2ea2083f840282f9..f415dffddbea0c9a46ca5267920adde7373b47e4 100644 (file)
@@ -19,9 +19,4 @@
                                        "loadaddr=20080000\0"   \
                                        "ethrotate=yes\0"
 
-#if defined(CONFIG_MMC_OCTEONTX)
-#define MMC_SUPPORTS_TUNING
-/** EMMC specific defines */
-#endif
-
 #endif /* __OCTEONTX2_COMMON_H__ */
index 4b8327f1f93b6bebdaa1c8e968b46df311afde73..7f1900363b91fc748795fa85f48da33b804f7148 100644 (file)
 
 struct bd_info;
 
-#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
-#define MMC_SUPPORTS_TUNING
-#endif
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
-#define MMC_SUPPORTS_TUNING
-#endif
-
 /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
 #define SD_VERSION_SD  (1U << 31)
 #define MMC_VERSION_MMC        (1U << 30)
@@ -485,7 +478,7 @@ struct dm_mmc_ops {
         */
        int (*get_wp)(struct udevice *dev);
 
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
        /**
         * execute_tuning() - Start the tuning process
         *