]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: imx: Power off display output on Data Modul i.MX8M Mini/Plus eDM SBC
authorMarek Vasut <marex@denx.de>
Mon, 18 Dec 2023 18:02:14 +0000 (19:02 +0100)
committerFabio Estevam <festevam@denx.de>
Mon, 18 Dec 2023 23:25:57 +0000 (20:25 -0300)
Turn display connector power off on boot and reboot to prevent any
bogus start up sequence of any panel potentially attached to the
display connector.

Signed-off-by: Marek Vasut <marex@denx.de>
arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi

index 144c42b210315c107a8a8b74dd83d5fcc437c416..a235e088fa4baf1deff50d7f70d7dca00508d203 100644 (file)
 
 &gpio2 {
        bootph-pre-ram;
+
+       dsi-reset-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               output-high;
+               gpios = <2 GPIO_ACTIVE_LOW>;
+               line-name = "DSI_RESET_1V8#";
+       };
+
+
+       dsi-irq-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               input;
+               gpios = <3 GPIO_ACTIVE_LOW>;
+               line-name = "DSI_IRQ_1V8#";
+       };
+
+       graphics-prsnt-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               input;
+               gpios = <7 GPIO_ACTIVE_LOW>;
+               line-name = "GRAPHICS_PRSNT_1V8#";
+       };
 };
 
 &gpio3 {
        bootph-pre-ram;
+
+       bl-enable-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               output-low;
+               gpios = <0 GPIO_ACTIVE_HIGH>;
+               line-name = "BL_ENABLE_1V8";
+       };
+
+       tft-enable-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               output-low;
+               gpios = <6 GPIO_ACTIVE_HIGH>;
+               line-name = "TFT_ENABLE_1V8";
+       };
+
+       graphics-gpio0-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               input;
+               gpios = <7 GPIO_ACTIVE_HIGH>;
+               line-name = "GRAPHICS_GPIO0_1V8";
+       };
 };
 
 &gpio4 {
index eafe9b9308c42f80d0ed61ff8238374e0a793434..a2b5976b6bdc618754afee2728260c87dc2f3a4f 100644 (file)
 
 &gpio3 {
        bootph-pre-ram;
+
+       bl-enable-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               output-low;
+               gpios = <0 GPIO_ACTIVE_HIGH>;
+               line-name = "BL_ENABLE_1V8";
+       };
+
+       tft-enable-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               output-low;
+               gpios = <6 GPIO_ACTIVE_HIGH>;
+               line-name = "TFT_ENABLE_1V8";
+       };
+
+       graphics-gpio0-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               input;
+               gpios = <7 GPIO_ACTIVE_HIGH>;
+               line-name = "GRAPHICS_GPIO0_1V8";
+       };
 };
 
 &gpio4 {
        bootph-pre-ram;
+
+       dsi-reset-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               output-high;
+               gpios = <0 GPIO_ACTIVE_LOW>;
+               line-name = "DSI_RESET_1V8#";
+       };
+
+       graphics-prsnt-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               input;
+               gpios = <18 GPIO_ACTIVE_LOW>;
+               line-name = "GRAPHICS_PRSNT_1V8#";
+       };
+
+       dsi-irq-hog {
+               bootph-pre-ram;
+               gpio-hog;
+               input;
+               gpios = <19 GPIO_ACTIVE_LOW>;
+               line-name = "DSI_IRQ_1V8#";
+       };
 };
 
 &gpio5 {