crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish

HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.

Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>

diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index a52c4ac957e0d1961c1866eaa08649ced4d9fb27..9e6829b7ad46f19347011d1b73afa89be9b1320a 100644 (file)
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -149,12 +149,20 @@ static int caam_hash_finish(void *hash_ctx, void *dest_buf,
                                  driver_hash[caam_algo].digestsize,
                                  1);
 
+       flush_dcache_range((ulong)ctx->sg_tbl, (ulong)(ctx->sg_tbl) + len);
+       flush_dcache_range((ulong)ctx->sha_desc,
+                          (ulong)(ctx->sha_desc) + (sizeof(uint32_t) * MAX_CAAM_DESCSIZE));
+       flush_dcache_range((ulong)ctx->hash,
+                          (ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
+
        ret = run_descriptor_jr(ctx->sha_desc);
 
        if (ret) {
                debug("Error %x\n", ret);
                return ret;
        } else {
+               invalidate_dcache_range((ulong)ctx->hash,
+                                       (ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
                memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
        }
        free(ctx);